GaN HEMT and Capacitor Layout With Mesa Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor devices incorporating high electron mobility transistors (HEMT) and capacitors face challenges in achieving efficient integration and independent operation without interference, particularly in GaN-based materials, which are known for their wide band gap and high electron mobility.

Innovation Solution

The semiconductor device integrates a high electron mobility transistor (HEMT) region and a capacitor region with mesa isolations and buffer layers, utilizing III-V semiconductors like gallium nitride (GaN) and aluminum gallium nitride (AlxGa1-xN), along with conductive and dielectric layers, to isolate and form independent devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If HEMT and capacitor are integrated on the same substrate, then device functionality is enhanced, but interference between regions increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidinterference between regions
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The substrate is divided into distinct HEMT region and capacitor region, with each region isolated by mesa structures. This segmentation allows both devices to coexist on the same substrate while preventing electrical and electromagnetic interference between them, thus maintaining enhanced functionality without mutual interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Mesa isolations and buffer layers are introduced as intermediary structures between the HEMT and capacitor regions. These intermediaries provide physical and electrical separation, acting as barriers that prevent harmful interference while allowing both devices to operate on the same substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If GaN-based materials are used, then electron mobility and breakdown voltage are improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectron mobility and breakdown voltageVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent utilizes GaN-based materials which fundamentally change the material parameters (band gap, electron mobility, breakdown voltage) to achieve superior device performance. The mesa isolation structures enable these high-performance materials to be processed using standardized semiconductor fabrication techniques, thereby managing manufacturing complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The device employs composite material structures including GaN high electron mobility layers, AlGaN barrier layers, and silicon carbide or silicon substrates. These composite structures leverage the advantages of each material while being fabricated through integrated process flows that manage complexity.

Inventive Principle:
Principle #40Composite materials

3Object-affected harmful factors

If mesa isolations are used to separate regions, then interference is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improveinterference reductionVSAvoidmesa isolation precision
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The mesa isolation structures segment the substrate into distinct functional regions. By using standard photolithography and etching processes to create these mesas, the design achieves effective region separation with manufacturing precision requirements that are within conventional semiconductor fabrication capabilities.

Inventive Principle:
Principle #1Segmentation

4Reliability

If buffer layers are introduced, then device performance is enhanced, but manufacturing steps increase

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Buffer layers are introduced to optimize material parameters such as lattice matching, dislocation density, and electrical properties. These buffer layers are integrated into the existing fabrication process flow, allowing performance enhancement while managing manufacturing complexity through process integration.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250113523A1High electron mobility transistor and method for fabricating the same
Publication Date: 2025.04.03 UNITED MICROELECTRONICS CORP
  • US20250113523A1 patent drawing
  • US20250113523A1 patent drawing
  • US20250113523A1 patent drawing

AI summary

A method for fabricating a semiconductor device includes the steps of first providing a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, forming a buffer layer on the substrate, forming a mesa isolation on the HEMT region, forming a HEMT on the mesa isolation, and then forming a capacitor on the capacitor region. Preferably, a bottom electrode of the capacitor contacts the buffer layer directly.