GaN HEMT Protection Circuit With Integrated Current Sensing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power semiconductor devices lack the ability to monolithically integrate both enhancement and depletion mode transistors within the same fabrication step, limiting the adjustment of threshold voltage and maximum gate bias voltage, which is time-consuming and costly, and do not offer reliable over-current and over-temperature protection.
Innovation Solution
A semiconductor device with an integrated sensing and protection circuit using a monolithically integrated current sensing transistor and depletion mode transistor, where the depletion mode transistor features a discontinuous p-GaN layer with islands to modulate the conductive path, allowing for internal and external feedback to adjust the gate bias and prevent over-current and over-temperature events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If enhancement mode devices are designed using conventional methods, then device performance is optimized for commutation mode, but the ability to adjust threshold voltage and maximum gate bias voltage is limited and time-consuming
Solution Approach 1:
The patent implements dynamic adjustability of threshold voltage and maximum gate bias voltage through a dual-mode transistor structure that can operate in both enhancement and depletion modes. The p-GaN layer can be selectively removed or retained to transition between modes, allowing the device characteristics to be dynamically adjusted post-fabrication without requiring time-consuming re-fabrication processes.
Solution Approach 2:
The patent changes the physical and electrical parameters of the transistor by controlling the presence or removal of the p-GaN layer. This allows transition between enhancement mode (with p-GaN) and depletion mode (without p-GaN), enabling adjustment of threshold voltage and maximum gate bias voltage parameters without modifying the fabrication process itself.
2Ease of manufacture
If sensing and protection circuits are integrated separately, then device functionality is complete, but system size and costs increase
Solution Approach 1:
The patent merges the sensing transistor and protection transistor into a single integrated device structure sharing common layers (AlGaN, GaN, p-GaN) and terminals. This monolithic integration reduces system size and manufacturing costs while maintaining complete sensing and protection functionality through shared physical and electrical infrastructure.
Solution Approach 2:
The integrated device structure serves multiple functions simultaneously: the sensing transistor monitors device operation, the protection transistor provides over-current and over-temperature protection, and both share common fabrication processes and physical layers. This multi-functionality reduces overall system complexity despite the enhanced capabilities.
3Reliability
If p-GaN/AlGaN/GaN HEMT structure is used, then enhancement mode operation is achieved, but reliable over-current and over-temperature protection is not provided
Solution Approach 1:
The patent segments the single transistor into two functional modes by selectively removing or retaining the p-GaN layer in different regions. The enhancement mode transistor (with p-GaN) provides high-performance switching, while the depletion mode transistor (without p-GaN) provides sensing and protection functions, allowing both reliability and functionality without excessive complexity.
Solution Approach 2:
The p-GaN layer acts as an intermediary element that enables transition between enhancement and depletion modes. By controlling its presence or removal, the device can switch between high-performance enhancement mode operation and protection-oriented depletion mode operation, providing reliable over-current and over-temperature protection while maintaining manageable device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient and cost-effective adjustment of threshold voltage, provides robust over-current and over-temperature protection, and reduces system size and costs by integrating sensing and protection functions within the same chip, improving performance and reliability.
Implementation Method 1
The use of an Aluminium Galium Nitride (AlGaN)/GaN heterostructure also allows the formation of a two-dimensional electron gas (2DEG) at the hetero-interface where carriers can reach very high mobility (μ=2000 cm2/(Vs)) values
Implementation Method 2
In addition, the piezopolarization charge present at the AlGaN/GaN heterostructure, results in a high electron density in the 2DEG layer
Data Source
AI summary
We disclose a Ill-nitride semiconductor based heterojunction power device, comprising: a first heterojunction transistor (19) formed on a substrate, the first heterojunction transistor comprising: a first Ill-nitride semiconductor region formed over the substrate, wherein the first Ill-nitride semiconductor region comprises a first heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a first terminal (8) operatively connected to the first Ill-nitride semiconductor region; a second terminal (9) laterally spaced from the first terminal and operatively connected to the first Ill-nitride semiconductor region; a first gate terminal (10) formed over the first Ill-nitride semiconductor region between the first terminal and the second terminal. The device also includes a second heterojunction transistor (14) formed on a substrate, the second heterojunction transistor comprising: a second Ill-nitride semiconductor region formed over the substrate, wherein the second Ill-nitride semiconductor region comprises a second heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a third terminal operatively connected to the second Ill-nitride semiconductor region; a fourth terminal laterally spaced from the third terminal in a first dimension and operatively connected to the second Ill-nitride semiconductor region, wherein the fourth terminal is operatively connected to the first gate terminal; and a second gate terminal formed over the second Ill-nitride semiconductor region between the third terminal and the fourth terminal and wherein the second heterojunction transistor is used in sensing and protection functions of the first power heterojunction transistor. The device also includes at least one monolithically integrated current sensing transistor (16) that has a substantially identical structure to the first heterojunction transistor, andwherein the third transistor is scaled to a smaller area or a shorter gate width when compared to the first heterojunction transistor by a scale factor, X, where X is larger than 1. Other embodiments include both internal and external sensing, sensing loads and a feedback circuit to provide overcurrent, gate over-voltage or over-temperature protection.