GaN HEMT Drain Segmentation for RF Stability

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Solution Overview

Problem

GaN HEMT devices using Si substrates face issues with RF characteristics degradation at high temperatures due to increased intrinsic carrier density, leading to reduced specific resistance and efficiency, primarily because Si has a higher intrinsic carrier density and greater temperature dependence compared to SiC substrates.

Innovation Solution

The field effect transistor design includes drain electrodes divided into separate portions with a Schottky electrode between them, which reduces parasitic capacitance by pinching off the 2DEG channel layer, thereby minimizing the impact of increased intrinsic carrier density on RF characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If Si substrate is used instead of SiC substrate, then manufacturing cost is reduced, but intrinsic carrier density increases causing loss increase at high temperatures

Engineering Contradiction:
Improvemanufacturing costVSAvoidenergy loss at high temperature
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The drain electrode is divided into multiple segments (first drain electrode portion and second drain electrode portion) separated by a Schottky electrode. This segmentation reduces the parasitic capacitance between the drain electrode and substrate by pinching off the 2DEG channel layer in the region between drain portions, thereby mitigating the high-temperature degradation of RF characteristics while maintaining the low parasitic capacitance benefit at room temperature.

Inventive Principle:
Principle #1Segmentation

2Reliability

If drain electrode width is reduced to reduce parasitic capacitance, then RF characteristics are improved, but device current handling capability is reduced

Engineering Contradiction:
ImproveRF characteristicsVSAvoidcurrent handling capability
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The drain electrode is divided into multiple segments (first drain electrode portion and second drain electrode portion) separated by a Schottky electrode. This segmentation reduces the parasitic capacitance between the drain electrode and substrate by pinching off the 2DEG channel layer in the region between drain portions, thereby mitigating the high-temperature degradation of RF characteristics while maintaining the low parasitic capacitance benefit at room temperature.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention addresses the capacitance issue not by reducing the drain electrode width in one dimension, but by introducing a Schottky electrode that creates a depletion region in the vertical dimension, effectively pinching off the 2DEG channel layer and reducing parasitic capacitance without compromising current handling capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively limits RF characteristics degradation by reducing parasitic capacitance and thermal resistance, enhancing the performance of GaN HEMT devices at high temperatures, particularly when using high-resistance Si substrates.

Implementation Method 1

a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate and disposed between the first portion and the second portion of the drain electrode

Methodology Applied
Scientific EffectSchottky barrier:

Implementation Method 2

The thermal resistance of the device can be reduced by increasing the gate pitch, thus enabling limiting of the increase in temperature during RF operation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

reducing the parasitic capacitance produced between drain electrodes and the substrate by reducing the drain electrode width

Methodology Applied
Scientific EffectParasitic capacitance: Capacitance

Data Source

PatentUS9716185B2Field effect transistor
Publication Date: 2017.07.25 MITSUBISHI ELECTRIC CORP
  • US9716185B2 patent drawing
  • US9716185B2 patent drawing
  • US9716185B2 patent drawing

AI summary

A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.