GaN HEMT Tri-Gate Fin Width Control for Multi-Threshold Voltage
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Solution Overview
Problem
Existing methods for fabricating multi-threshold voltage AlGaN/GaN high-electron-mobility transistors (HEMTs) face issues such as high gate-leakage current, hysteresis, and unreliable results due to surface damage and unpredictable outcomes from techniques like barrier-thinning and fluoride-based plasma treatment.
Innovation Solution
The method involves forming a tri-gate structure with varying fin widths in the semiconductor layers, using electron beam lithography and inductively coupled plasma-reactive ion etching to create trenches and fins, allowing for the modification of two-dimensional electron sheet concentration without additional fabrication steps or surface damage, thereby shifting the threshold voltage of AlGaN/GaN HEMTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If barrier-thinning or fluoride-based plasma treatment is used to fabricate multi-threshold voltage HEMTs, then threshold voltage can be adjusted, but gate-leakage current increases and hysteresis occurs due to surface damage
Solution Approach 1:
The patent applies local quality by creating fins with different widths at different locations within the active area. Each fin width corresponds to a specific threshold voltage, allowing multiple threshold voltages to coexist on a single device. The fin width locally determines the 2DEG concentration and thus the threshold voltage, enabling spatial variation of electrical characteristics without surface damage.
Solution Approach 2:
The patent transitions from a two-dimensional planar gate structure to a three-dimensional fin structure. By etching trenches and forming fins with varying widths in the vertical dimension, the invention creates multiple threshold voltages within a single gate contact terminal area. This dimensional change allows threshold voltage differentiation without requiring separate devices or surface modification techniques.
2Ease of manufacture
If conventional planar gate structure is used, then fabrication is simple, but all transistors on the wafer have the same threshold voltage
Solution Approach 1:
The patent segments the active area by etching trenches that divide it into multiple regions with different fin widths. Each segment (fin region) corresponds to a specific threshold voltage. This segmentation allows a single wafer to produce transistors with different threshold voltages while maintaining a unified fabrication process and gate contact structure.
Solution Approach 2:
The patent changes the geometric parameter of fin width to control threshold voltage. By varying the fin width parameter across different regions of the active area, the invention achieves threshold voltage variation. This parameter-based control is more reliable than chemical etching methods and maintains ease of manufacture through standard lithography and etching processes.
3Adaptability or versatility
If fin width is reduced to increase threshold voltage, then multi-threshold capability is achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary action by defining all fin width variations through a single lithography and etching process before subsequent fabrication steps. The trenches and fins are formed in advance with precise width control, establishing the threshold voltage distribution early in the fabrication sequence. This preliminary structuring ensures consistent threshold voltages across multiple devices on the same wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the reliable fabrication of HEMTs with different threshold voltages on a single wafer, minimizing surface damage and achieving consistent results, suitable for applications in RF, power electronics, and extreme environments.
Implementation Method 1
semiconductor layers made of aluminum gallium nitride (AlGaN) and gallium nitride (GaN) which create a sheet of two-dimensional electron gases (2DEG) by positive polarization induced interface charges (spontaneous and piezoelectric polarization)
Implementation Method 2
positive polarization induced interface charges (spontaneous and piezoelectric polarization)
Implementation Method 3
using electron beam lithography and inductively coupled plasma-reactive ion etching to create trenches and fins
Implementation Method 4
using electron beam lithography and inductively coupled plasma-reactive ion etching to create trenches and fins
Data Source
AI summary
A device and method of fabricating a device having a plurality of depletion-mode high-electron-mobility transistors (HEMTs) on a single wafer are disclosed. The method of fabrication involves providing semiconductor layers capable of sustaining a two-dimensional electron sheet to enable electrical current to flow through the HEMT, forming a series of trenches and fins in the semiconductor layers over an active area of the semiconductor layers on which a gate contact terminal is to be set down, the fins of respective HEMTs having different widths resulting in different voltage thresholds for the respective depletion-mode HEMTs.