GaN HEMT Gate Recess Interface for Low-Damage Normally-Off Fabrication

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Solution Overview

Problem

The existing methods for forming normally-off GaN HEMTs face challenges such as etching damage to the underlying AlGaN layer, complexity, low productivity, and high costs, along with surface roughness issues at the AlGaN/P-type GaN interface affecting device performance.

Innovation Solution

A method involving the formation of a substrate with a channel layer, an electron supply layer, a dielectric passivation layer, and a gate recess, where a surface modification layer is deposited and treated to transform into a silicon oxide or nitride layer, allowing for the growth of a P-type GaN layer within the gate recess without penetrating through the electron supply layer, thereby reducing surface roughness and interface defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If directly etching a P-type GaN layer is used to form a normally-off GaN HEMT, then the device can be formed, but etching damage occurs to the underlying AlGaN layer

Engineering Contradiction:
Improvefabrication simplicityVSAvoidetching damage to AlGaN layer
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A surface modification layer (e.g., amorphous silicon layer) is introduced as an intermediary between the etching process and the AlGaN layer. This layer is deposited on the AlGaN surface before P-type GaN formation, serving as a protective barrier that prevents direct etching damage to the AlGaN layer while allowing the P-type GaN to be formed in the gate recess.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a re-growth method is used to grow an AlGaN layer on a P-type GaN layer, then the normally-off GaN HEMT can be formed, but the process becomes too complex with low productivity and high cost

Engineering Contradiction:
Improvedevice performanceVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The surface modification layer is deposited and treated (oxidation or nitridation) before forming the P-type GaN layer in the gate recess. This preliminary action prepares the surface in advance, eliminating the need for complex re-growth processes while ensuring proper interface quality and device performance.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If the gate recess is formed without surface modification, then the fabrication process is simpler, but surface roughness at the AlGaN/P-type GaN interface adversely affects device performance

Engineering Contradiction:
Improvefabrication efficiencyVSAvoidinterface surface roughness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The surface modification layer is deposited and subjected to oxidation or nitridation treatment before forming the P-type GaN layer. This preliminary surface preparation creates a smooth, chemically stable interface that prevents surface roughness issues, while the entire process remains integrated and efficient.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the productivity and reduces costs by minimizing etching damage and surface roughness, improving the performance of GaN HEMTs by forming a high-quality P-type GaN layer within the gate recess.

Implementation Method 1

The surface modification layer is then subjected to an oxidation treatment or a nitridation treatment

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

The surface modification layer is then subjected to an oxidation treatment or a nitridation treatment

Methodology Applied
Scientific EffectNitridation: Nitriding

Implementation Method 3

A surface modification layer is conformally deposited on an interior surface of the gate recess

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS20230282740A1High electron mobility transistor and fabrication method thereof
Publication Date: 2023.09.07 UNITED MICROELECTRONICS CORP
  • US20230282740A1 patent drawing
  • US20230282740A1 patent drawing
  • US20230282740A1 patent drawing

AI summary

A high electron mobility transistor including a substrate; a channel layer on the substrate; an electron supply layer on the channel layer; a dielectric passivation layer on the electron supply layer; a gate recess in the dielectric passivation layer and the electron supply layer; a surface modification layer on an interior surface of the gate recess; and a P-type GaN layer in the gate recess and on the surface modification layer. The surface modification layer has a gradient silicon concentration.