GaN HEMT Bus Layout for Reduced Gate Oscillation
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Solution Overview
Problem
GaN power devices experience significant gate oscillations due to resonance phenomena, which can lead to device malfunction or destruction, especially in fast-switching applications, as existing topologies for distributing gate signals are not adequately stable.
Innovation Solution
A heterojunction power device design featuring symmetrically arranged active areas with a separation region, where a first conductive bus distributes a control signal and a second conductive bus distributes a source signal in parallel, with the second bus overlaying the first, effectively canceling inductive parasitic components and reducing oscillations by creating a balanced and shielded electrical path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional gate signal distribution topologies are used in GaN power devices, then device complexity is reduced, but gate oscillation and resonance phenomena occur leading to device malfunction or destruction
Solution Approach 1:
The gate signal distribution is segmented into multiple conductive buses (first conductive bus for gate signal, second conductive bus for source signal) that are spatially separated and independently routed. This segmentation allows each bus to be optimized for its specific signal type, reducing cross-interference and oscillation while maintaining manageable complexity through modular design
Solution Approach 2:
The conductive buses are arranged in a three-dimensional configuration where the second conductive bus overlays the first conductive bus in certain regions. This vertical stacking in the third dimension reduces the horizontal footprint and creates controlled coupling between buses to mitigate oscillation without requiring a completely complex planar redistribution
2Productivity
If fast-switching operation is implemented in Gan power devices, then productivity is improved, but gate oscillation due to resonance phenomena increases
Solution Approach 1:
The conductive bus structure is pre-designed with specific geometric configurations and spacing to counteract the resonance phenomena that occur during fast switching. The buses are positioned and dimensioned beforehand to create opposing electromagnetic fields that cancel out oscillation, providing preliminary anti-action against the harmful resonance effects before they can damage the device
Solution Approach 2:
The patent utilizes the parasitic inductance and capacitance of the conductive buses, which would normally cause oscillation, by carefully designing their geometry and arrangement. The overlapping configuration creates controlled mutual inductance that, when properly designed, actually dampens oscillation rather than exacerbating it, converting the potentially harmful parasitic elements into beneficial damping mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly minimizes unwanted oscillations during switching phases, reducing the risk of gate region damage and ensuring synchronized operation of active elements, thereby enhancing the reliability and safety of GaN power devices.
Implementation Method 1
the capacitance of the device substrate
Implementation Method 2
the inductance of the conductive paths of the gate signal and the capacitance of the device substrate
Data Source
AI summary
A heterojunction power device includes: a substrate containing semiconductor material; a first active area and a second active area, arranged on the substrate symmetrically opposite with respect to an axis of symmetry and accommodating respective heterostructures; a separation region, extending along the axis of symmetry between the first active area and the second active area. The power device further includes: a first conductive bus configured to distribute a first electric potential of the power device in parallel to the first and the second active areas; a second conductive bus configured to distribute a second electric potential of the power device, different from the first electric potential, in parallel to the first and the second active areas. The first and the second conductive buses extend along the axis of symmetry above the separation region and the second conductive bus overlies the first conductive bus.


