GaN HEMT Gate Ridge Structure for Normally-Off Operation

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Solution Overview

Problem

Nitride semiconductor devices, particularly high-electron-mobility transistors (HEMTs), face challenges in achieving reliable normally-off operation due to the difficulty in controlling the two-dimensional electron gas (2DEG) formation and maintaining low on-resistance while ensuring gate reliability and preventing dielectric breakdown.

Innovation Solution

The nitride semiconductor device incorporates a gate layer with a ridge structure and extensions, where the gate layer is positioned between two openings in the passivation layer, and includes a source-side and drain-side extension with specific thickness and intermediate portions to manage the equipotential lines and electric field distribution, enhancing gate reliability and reducing on-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a p-type GaN layer is used as gate layer to achieve normally-off operation, then the channel disappears from the region below the gate electrode, but gate leakage current increases and breakdown voltage decreases

Engineering Contradiction:
Improvenormally-off operationVSAvoidgate leakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The gate layer is segmented into a ridge portion (directly above the channel) and extension portions (extending toward source and drain), with the extension portions having different thicknesses. This segmentation allows different regions of the gate layer to perform different functions: the ridge portion controls the channel while the extensions manage electric field distribution to reduce leakage and increase breakdown voltage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate layer exhibits local quality variations through asymmetric extension thicknesses. The first extension portion has a different thickness than the second extension portion, creating localized differences in electric field management. This allows optimization of gate reliability and breakdown characteristics in specific regions without compromising overall normally-off operation.

Inventive Principle:
Principle #3Local quality

2Reliability

If the gate layer extensions are made thicker to reduce on-resistance, then on-resistance decreases, but electric field concentration increases causing dielectric breakdown

Engineering Contradiction:
Improveon-resistanceVSAvoiddielectric breakdown
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The thickness of the gate layer extensions is precisely controlled as a key parameter. The first extension portion has a thickness within 5-20 nm while the second extension portion has a thickness within 10-30 nm. These parameter changes optimize the balance between reducing on-resistance (through sufficient extension thickness) and preventing dielectric breakdown (through controlled thickness limits).

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The solution moves from considering only the vertical dimension to incorporating horizontal extension dimensions. The gate layer extensions project laterally toward the source and drain regions, creating a three-dimensional structure where the extension length and thickness both contribute to electric field management and resistance control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively improves gate reliability by reducing gate leakage current and increasing breakdown voltage, while maintaining low on-resistance, thus achieving reliable normally-off operation and improved voltage stress resistance.

Implementation Method 1

The acceptor impurity included in the p-type GaN layer causes the channel in the electron transit layer to disappear from the region immediately below the gate electrode

Methodology Applied
Scientific Effect2DEG formation and depletion:

Implementation Method 2

the first intermediate portion 40 has a greater cross-sectional area than the second intermediate portion 44, thereby reducing concentration of the equipotential lines in the first intermediate portion 40

Methodology Applied
Scientific EffectElectric field distribution: Electric Field

Data Source

PatentUS20240030333A1Nitride semiconductor device
Publication Date: 2024.01.25 ROHM CO LTD
  • US20240030333A1 patent drawing
  • US20240030333A1 patent drawing
  • US20240030333A1 patent drawing

AI summary

A nitride semiconductor device includes an electron transit layer, an electron supply layer, a gate layer, a gate electrode, a passivation layer, a source electrode, and a drain electrode. The gate layer includes a ridge including an upper surface of the gate layer, a source-side extension smaller in thickness than the ridge, and a drain-side extension smaller in thickness than the ridge. The source-side extension includes a first step portion including an upper surface parallel to a bottom surface of the gate layer and a first intermediate portion connecting the first step portion to the ridge. The drain-side extension includes a second step portion including an upper surface parallel to the bottom surface of the gate layer and a second intermediate portion connecting the second step portion to the ridge. The first intermediate portion has a cross-sectional area that is greater than that of the second intermediate portion.