GaN-HEMT Gate Driver Circuit for Suppressing Voltage Ringing
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Solution Overview
Problem
Existing driver circuits for GaN-HEMTs face issues with voltage ringing due to steep current changes during switching operations, leading to parasitic inductance-induced oscillations and power supply voltage fluctuations.
Innovation Solution
A driver circuit design that controls the turn-on and turn-off timings of PMOS and NMOS transistors, incorporating a level shift element and inverters to manage gate capacitance charging and discharging, reducing the rate of current change and maintaining stable voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate capacitance of the switching transistor is charged quickly to enable high-speed switching, then the switching speed is improved, but voltage ringing and power supply fluctuations occur due to parasitic inductance
Solution Approach 1:
The patent divides the gate capacitance charging process into multiple stages using a two-stage driver circuit. The first stage charges the gate capacitance to an intermediate voltage level, and the second stage completes the charging to the final voltage level. This segmentation reduces the rate of current change (di/dt) during switching, thereby suppressing voltage ringing and power supply fluctuations caused by parasitic inductance while maintaining high switching speed.
2Device complexity
If a conventional single-stage driver circuit is used, then the circuit complexity is low, but voltage ringing occurs during switching operations
Solution Approach 1:
The driver circuit is segmented into two distinct stages: a first driver circuit for initial charging and a second driver circuit for final charging of the gate capacitance. This segmentation increases circuit complexity but effectively suppresses voltage ringing by controlling the charging current profile, demonstrating that increased complexity can resolve reliability issues.
3Productivity
If the charging current to gate capacitance is increased to reduce switching time, then productivity is improved, but parasitic inductance causes harmful voltage oscillations
Solution Approach 1:
The charging current is segmented into two phases: an initial phase with moderate current from the first driver circuit, and a final phase with higher current from the second driver circuit. This segmentation allows the system to achieve high switching frequency (productivity) while avoiding excessive di/dt that would cause voltage ringing, by distributing the charging current over time.
Solution Approach 2:
The first driver circuit performs preliminary charging of the gate capacitance to an intermediate voltage level before the second driver circuit completes the charging. This preliminary action reduces the remaining charge requirement, allowing the second stage to complete switching faster while the overall di/dt remains controlled, thus improving productivity without generating harmful voltage oscillations.
Data Source
AI summary
A driver circuit that drives a switching transistor which is a GaN-HEMT (High Electron Mobility Transistor), includes: an output line connected to a gate of the switching transistor; a low-side line connected to a source of the switching transistor; a high-side line; a first PMOS transistor that is connected between the high-side line and the output line; a first NMOS transistor that is connected between the output line and the low-side line; a second PMOS transistor that is connected between the high-side line and the output line; a second NMOS transistor that is connected between the output line and the low-side line; a third NMOS transistor that is connected between the high-side line and the output line; and a control circuit that generates the P gate signal, the first N gate signal, and the second N gate signal.