GaN HEMT Gate Electrode Refractory Silicide Composite
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Solution Overview
Problem
Current nitride semiconductor devices face challenges in achieving normally-off type characteristics and reducing device size due to issues like current collapse and gate leakage current, particularly during the fabrication process of JFETs, where high temperature annealing can cause peeling off or degradation of gate electrodes made from materials like nickel or palladium.
Innovation Solution
The solution involves patterning a p-type conductive layer under the gate electrode in a self-alignment manner and using a gate electrode made of refractory materials such as tungsten silicide, rhenium silicide, or molybdenum silicide, which allows for high temperature annealing without degradation, and incorporating a gold or palladium layer for reduced contact resistance and adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high temperature annealing is performed during fabrication, then crystal quality and device performance are improved, but gate electrodes made of nickel or palladium peel off or degrade
Solution Approach 1:
The gate electrode is constructed as a composite structure with a refractory material layer (tungsten silicide, rhenium silicide, or molybdenum silicide) as the base and a thin layer of nickel or palladium (5 nm or less) as the upper layer. This composite structure allows the gate electrode to withstand high temperature annealing (the refractory material's function) while maintaining good adhesion to the semiconductor layer (the nickel or palladium's function), thus resolving the contradiction between improving device performance through high temperature processing and preventing gate electrode degradation.
2Area of moving object
If device size is reduced, then integration density increases, but fabrication precision and quality control become more difficult
Solution Approach 1:
The invention changes the material parameter of the gate electrode from conventional nickel or palladium alone to a composite structure with refractory material as the base. This material parameter change enables the gate electrode to maintain structural stability and adhesion properties even when the overall device dimensions are reduced, thus allowing miniaturization without sacrificing fabrication precision and quality control.
3Speed
If channel length is reduced to minimize current collapse, then device speed increases, but gate leakage current increases
Solution Approach 1:
The composite gate electrode structure with refractory material base and thin nickel or palladium upper layer creates optimal electrical characteristics. The refractory material provides structural stability and controls the potential distribution, while the thin layer of nickel or palladium (5 nm or less) maintains good adhesion and appropriate electrical properties. This composite structure enables effective suppression of gate leakage current even with reduced channel length, thus achieving high device speed without excessive leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces channel resistance, minimizes current collapse, and enables the formation of smaller nitride semiconductor devices with stable gate electrodes, enhancing the normally-off type characteristics and device performance.
Implementation Method 1
using a gate electrode made of refractory materials such as tungsten silicide, rhenium silicide, or molybdenum silicide, which allows for high temperature annealing without degradation
Implementation Method 2
incorporating a gold or palladium layer for reduced contact resistance and adhesion
Data Source
AI summary
A semiconductor device includes: a channel layer made of GaN; a barrier layer formed on the channel layer, the bather layer being made of AlGaN and having a larger band gap than the channel layer; a p-type GaN layer selectively formed on the barrier layer; a gate electrode made of ITO on the p-type GaN layer; and a source electrode and a drain electrode on regions of the barrier layer laterally outward of the gate electrode. The width of the gate electrode in the gate length direction is smaller than or equal to the width of the p-type GaN layer in the gate length direction, and the difference between the width of the gate electrode in the gate length direction and the width of the p-type GaN layer in the gate length direction is less than or equal to 0.2 μm.