GaN HEMT Gate Stack for Higher Breakdown and Lower Leakage

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Solution Overview

Problem

Conventional GaN-based High Electron Mobility Transistors (HEMTs) face issues with relatively low breakdown voltage, particularly in enhancement mode devices, which complicates circuit structures and affects safety.

Innovation Solution

A semiconductor structure with a specific configuration including a P-type semiconductor layer, an aluminum-containing film layer, and a gate contact layer, aligned sidewalls, and N-type doped source and drain regions, along with a heterojunction design to enhance breakdown voltage and reduce leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a P-type gate is adopted in a conventional GaN-based HEMT device to achieve enhancement mode, then the device can operate in enhancement mode, but the breakdown voltage remains relatively low

Engineering Contradiction:
Improvebreakdown voltageVSAvoidgate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a composite gate structure consisting of multiple layers including P-type semiconductor layer, aluminum-containing film layer, and gate contact layer. This composite structure combines the advantages of different materials to achieve both enhancement mode operation and high breakdown voltage, resolving the contradiction between reliability improvement and device complexity

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent introduces a vertical multi-layer stacking dimension to the gate structure, transitioning from a conventional single-layer P-type gate to a multi-layer composite gate. This dimensional change allows for optimized electrical properties at each layer interface, achieving high breakdown voltage while maintaining enhancement mode operation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If a conventional P-type gate structure is used, then the device structure is relatively simple, but the breakdown voltage is relatively low and circuit safety is reduced

Engineering Contradiction:
Improvefabrication simplicityVSAvoidcircuit safety
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The gate structure is segmented into multiple functional layers, each with specific thickness and material composition. This segmentation allows independent optimization of each layer's properties to maximize breakdown voltage while maintaining manufacturability through standard semiconductor fabrication processes

Inventive Principle:
Principle #1Segmentation

3Reliability

If the aluminum-containing film layer thickness is increased, then the breakdown voltage is improved, but the gate leakage current may increase

Engineering Contradiction:
Improvebreakdown voltageVSAvoidgate leakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent optimizes the thickness parameter of the aluminum-containing film layer to a specific range that balances breakdown voltage enhancement and leakage current suppression. By precisely controlling this parameter within an optimal window, both contradictory requirements are satisfied

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure increases breakdown voltage and reduces gate leakage current, simplifying fabrication and improving the reliability and performance of GaN-based HEMT devices.

Implementation Method 1

the aluminum-containing film layer is located between the gate contact layer and the first P-type semiconductor layer... the aluminum-containing film layer reduces a gate leakage current of the semiconductor device by blocking an electron tunneling

Methodology Applied
Scientific EffectTunneling:

Data Source

PatentUS20250359123A1Semiconductor structure and fabricating method thereof
Publication Date: 2025.11.20 ENKRIS SEMICON
  • US20250359123A1 patent drawing
  • US20250359123A1 patent drawing
  • US20250359123A1 patent drawing

AI summary

Disclosed are a semiconductor structure and a fabricating method thereof. The semiconductor structure includes a substrate, a channel layer, a barrier layer and a first P-type semiconductor layer stacked sequentially, the channel layer and the barrier layer form a heterojunction, and the 2DEG at the channel may be depleted by the first P-type semiconductor layer, so as to implement an enhancement mode device; and a sidewall of the first P-type semiconductor layer, a sidewall of the aluminum-containing film layer, and a sidewall of the gate contact layer that are aligned are stacked sequentially on the barrier layer in a gate region, and a material of the aluminum-containing film layer includes at least any one of AlN, AlON or Al2O3.