GaN HEMT Gate Structure With N-Face p-GaN for Stable E-Mode Switching
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Solution Overview
Problem
The existing manufacturing processes for AlGaN/GaN High Electron Mobility Transistors (HEMTs) face challenges in achieving enhancement-mode devices due to difficulties in precise control of p-type semiconductor etching, leading to current collapse and instability issues.
Innovation Solution
A semiconductor structure and manufacturing method involving a substrate with a GaN-based channel and barrier layer, where a p-type GaN-based semiconductor layer with an N-face surface is formed in the gate region, facilitating easier etching control and stability through the use of a polarity reversal element like Mg, and incorporating a nucleation and buffer layer for improved crystal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type semiconductor material is disposed in the gate region to reduce carrier concentration, then enhancement-mode device performance is improved, but the manufacturing precision deteriorates due to difficulty in controlling etching thickness
Solution Approach 1:
The patent applies preliminary action by forming a sacrificial AlGaN layer with a specific thickness (5-20 nm) before the p-type GaN layer during the epitaxial growth process. This pre-formed layer serves as a built-in thickness reference that guides the subsequent selective etching process, ensuring that the etching stops at the correct position without requiring complex real-time monitoring, thus solving the manufacturing precision problem while maintaining enhancement-mode device performance
Solution Approach 2:
The patent introduces a sacrificial AlGaN layer as an intermediary between the barrier layer and the p-type GaN layer. This intermediary layer facilitates the selective etching process by providing a distinct etching target that can be removed to expose the p-type layer in the gate region, while the different etching rates between AlGaN and GaN ensure precise stopping before damaging underlying layers, thereby resolving the contradiction between achieving enhancement-mode performance and maintaining manufacturing precision
2Adaptability or versatility
If selective etching of p-type semiconductors is performed to achieve enhancement-mode operation, then device functionality is improved, but reliability deteriorates due to current collapse effects from etching defects
Solution Approach 1:
The sacrificial AlGaN layer acts as a protective intermediary during the selective etching process. By targeting the AlGaN layer for removal rather than directly etching the p-type GaN layer, the process achieves the necessary exposure of p-type material for enhancement-mode operation while the AlGaN sacrificial layer prevents direct exposure and potential damage to the underlying channel and barrier layers, thus eliminating current collapse defects and maintaining device reliability
Solution Approach 2:
The patent applies beforehand cushioning by designing the epitaxial structure with the sacrificial AlGaN layer positioned between the barrier layer and p-type GaN layer. This layer serves as a cushion or buffer during the selective etching process, absorbing the etching action and preventing it from penetrating too deeply and causing damage to critical underlying layers, thereby preventing current collapse effects before they can occur
3Device complexity
If the barrier layer is made thinner to reduce epitaxial thickness, then manufacturing complexity is reduced, but the quality of the Schottky gate deteriorates
Solution Approach 1:
The patent applies another dimension by introducing a vertical stacking arrangement with the sacrificial AlGaN layer positioned between the barrier layer and p-type GaN layer. This additional layer in the vertical dimension allows for a thinner overall barrier layer while maintaining sufficient distance between the Schottky gate and the p-type region, enabling both reduced epitaxial thickness and high Schottky gate quality through the intermediate spacing provided by the sacrificial layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of a stable and reliable enhancement-mode GaN switching device by pinching off the n-type conductive layer under the gate, reducing etching process complexity and enhancing the quality of the Schottky gate, while allowing for high doping concentration and ohmic contact.
Implementation Method 1
preparing a p-type GaN-based semiconductor layer of GaN-based material with N-face as an upper surface above the barrier layer
Implementation Method 2
doping a polarity reversal element in the p-type Ga-face GaN-based material to reverse the p-type Ga-face GaN-based material to the p-type GaN-based semiconductor layer of GaN-based material with N-face as an upper surface
Data Source
AI summary
Embodiments of the present application disclose a semiconductor structure and a manufacturing method for the semiconductor structure, which solve problems of complicated manufacturing process and poor stability and reliability of existing semiconductor structures. The semiconductor structure includes: a substrate; a channel layer and a barrier layer sequentially superimposed on the substrate, wherein the channel layer and the barrier layer are made of GaN-based materials and an upper surface of the barrier layer is Ga-face; and a p-type GaN-based semiconductor layer formed in a gate region of the barrier layer. An upper surface of the p-type GaN-based semiconductor layer is N-face.