Normally-off GaN HEMT with p-type Gate Extension

The patent changes the electrical parameter of the lower semiconductor layer by making it p-type with a specific resistivity range (1×10^-3 to 1×10^0 Ω·cm). This parameter change enables the lower layer to function as an extension of the gate electrode, allowing the gate control to extend to the drain and source regions without requiring excessively large physical distances between electrodes, thus resolving the contradiction between voltage withstand capability and device design complexity

The patent specifies a precise resistivity range (1×10^-3 to 1×10^0 Ω·cm) for the p-type lower semiconductor layer. This parameter optimization ensures that the layer is conductive enough to be controlled by the gate electrode voltage while maintaining p-type characteristics for normally-off operation. The controlled resistivity allows the gate voltage to effectively modulate the two-dimensional electron gas formation, resolving the contradiction between reliability and ease of operation

The patent specifies a thickness range of 5 nm to 200 nm for the upper semiconductor layer. This optimized thickness range ensures sufficient electron supply capability for forming the two-dimensional electron gas while remaining within practical manufacturing precision capabilities. The lower bound of 5 nm ensures adequate electron supply, while the upper bound of 200 nm remains manufacturable with standard semiconductor fabrication techniques, resolving the contradiction between power and manufacturing precision