GaN HEMT p-type Gate Insulator for Normally-Off Operation
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Solution Overview
Problem
Developing high electron mobility transistors (HEMTs) based on III-V semiconductor compounds faces challenges in achieving enhanced-mode operation with reduced circuit complexity and cost, particularly in controlling the carrier channel and preventing gate leakage.
Innovation Solution
The semiconductor structure incorporates a heterojunction between undoped GaN and AlN layers, with a p-type layer introduced to deplete the carrier channel and act as a gate insulator, along with intermetallic compounds like Al, Ti, or Cu for improved electrical connections and reduced Au contamination, enabling enhanced-mode HEMT operation with a normally-off channel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a heterojunction between III-V semiconductor compounds is used to form a HEMT, then electron mobility and high frequency transmission are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent segments the channel region into multiple distinct layers with different band gaps (first III-V compound layer, second III-V compound layer, and third III-V compound layer). Each layer serves a specific function: the first layer provides high electron mobility, the second layer forms the heterojunction for electron accumulation, and the third layer provides additional band gap engineering. This segmentation allows optimization of electron transport while maintaining manufacturability through standardized layer deposition processes.
Solution Approach 2:
The patent employs composite material structures by combining different III-V semiconductor compounds (such as GaN, AlGaN, InGaN) with distinct band gap properties. The heterojunction between these composite layers creates a two-dimensional electron gas (2DEG) at the interface, enabling high electron mobility without requiring heavy doping. The composite structure leverages the complementary properties of each material to achieve both high performance and controlled manufacturing.
2Device complexity
If an enhancement-mode HEMT is developed to eliminate negative-polarity voltage supply, then circuit complexity and cost are reduced, but control over carrier channel and prevention of gate leakage become more difficult
Solution Approach 1:
The patent utilizes parameter changes in the band gap energy of the III-V semiconductor layers to achieve enhancement-mode operation. By carefully selecting the band gap differences between adjacent layers (e.g., GaN/AlGaN interfaces), the patent creates potential barriers that control carrier concentration. The undoped or lightly-doped structure combined with specific layer thicknesses and composition ratios enables precise control of the two-dimensional electron gas formation, allowing the transistor to operate in enhancement mode with normally-off characteristics.
Solution Approach 2:
The patent introduces an intermediary undoped or lightly-doped third III-V compound layer between the doped second layer and the channel region. This intermediary layer acts as a buffer that modulates the electric field distribution and carrier concentration profile. It provides a transition zone that enables precise control over the carrier channel formation while preventing direct leakage paths, thus facilitating enhancement-mode operation without requiring complex negative voltage supplies.
3Reliability
If Au is used for electrical connections in HEMT, then conductivity is improved, but contamination and manufacturing cost increase
Solution Approach 1:
The patent replaces expensive gold (Au) intermetallic compounds with cheaper alternative materials such as aluminum (Al), titanium (Ti), or copper (Cu) intermetallic compounds formed with the semiconductor layers. These alternative materials provide sufficient electrical conductivity for the application while eliminating the contamination issues associated with Au. The use of these materials aligns with the principle of substituting expensive, problematic materials with more economical and environmentally friendly alternatives that meet the performance requirements.
Solution Approach 2:
The patent changes the material composition parameter of the intermetallic compounds from Au-based to Al/Ti/Cu-based materials. This parameter change maintains the essential function of providing low-resistance electrical contacts while eliminating the harmful contamination effects of Au. The alternative materials form stable intermetallic compounds with the III-V semiconductor layers that provide adequate conductivity for HEMT operation without the drawbacks of gold contamination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electron mobility, reduces electron scattering, and lowers manufacturing costs by eliminating Au contamination, while ensuring accurate control over HEMT performance across semiconductor chip regions.
Implementation Method 1
A HEMT is a field effect transistor incorporating a junction between two materials with different band gaps (i.e., a heterojunction) as the channel
Implementation Method 2
HEMTs have a number of attractive properties including high electron mobility
Implementation Method 3
depositing a p-type layer on a portion of the second III-V compound layer between the source feature and the drain feature
Implementation Method 4
a p-type layer introduced to deplete the carrier channel and act as a gate insulator
Implementation Method 5
intermetallic compounds like Al, Ti, or Cu for improved electrical connections and reduced Au contamination
Data Source
AI summary
A method of forming a high electron mobility transistor (HEMT) includes forming a second III-V compound layer on a first III-V compound layer, forming a source feature and a drain feature on the second III-v compound layer, depositing a p-type layer on a portion of the second III-V compound layer between the source feature and the drain feature, and forming a gate electrode on the p-type layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer.