GaN HEMT Protection Layer Fixed Charge Current Collapse

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Solution Overview

Problem

GaN-based semiconductor switching elements experience 'current collapse' when high drain voltage is applied, leading to increased on-resistance due to electron trapping in the protection layer, which affects the performance of high electron mobility transistors (HEMTs) used in circuits like switching power supplies and inverters.

Innovation Solution

Incorporating a protection layer with a high concentration of fluorine, hydrogen, vanadium, niobium, or tantalum as a positive fixed charge, and a gate insulating layer with nitrogen, phosphorus, arsenic, or other elements to stabilize the heterojunction interface and reduce potential variations, thereby restraining current collapse and enabling normally-off operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electron trapping in protection layer is reduced, then on-resistance stability is improved, but device structure and manufacturing complexity increases

Engineering Contradiction:
Improveon-resistance stabilityVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the electrical characteristics of the gate insulating layer through the introduction of positive fixed charge carriers. Specifically, the protection layer is designed to contain a positive fixed charge density in the range of 1×10^12 to 1×10^14 cm^-2, which compensates for electron trapping without requiring fundamental changes to the HEMT structure. This parameter adjustment maintains on-resistance stability while avoiding excessive structural complexity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If positive fixed charge concentration in protection layer is increased, then current collapse is restrained, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecurrent collapse restraintVSAvoidfixed charge concentration control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies composite materials by combining a base gate insulating material (such as silicon oxide, silicon nitride, or silicon oxynitride) with a protection layer containing positive fixed charge carriers (such as hafnium oxide, zirconium oxide, titanium oxide, aluminum oxide, lanthanum oxide, yttrium oxide, or scandium oxide). This composite structure provides both the necessary electrical insulation and the positive fixed charge compensation, with the positive fixed charge concentration controlled in the range of 1×10^12 to 1×10^14 cm^-2, achieving current collapse restraint while managing manufacturing precision requirements.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces current collapse and achieves stable normally-off operation in GaN-based HEMTs by maintaining sufficient fixed charge concentrations in the protection and gate insulating layers, enhancing the devices' performance and reliability.

Implementation Method 1

Incorporating a protection layer with a high concentration of fluorine, hydrogen, vanadium, niobium, or tantalum as a positive fixed charge, and a gate insulating layer with nitrogen, phosphorus, arsenic, or other elements to stabilize the heterojunction interface and reduce potential variations

Methodology Applied
Scientific EffectFixed charge compensation:

Implementation Method 2

a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer

Methodology Applied
Scientific EffectTwo-dimensional electron gas formation:

Data Source

PatentUS9711362B2Semiconductor device and method of manufacturing the same
Publication Date: 2017.07.18 KK TOSHIBA
  • US9711362B2 patent drawing
  • US9711362B2 patent drawing
  • US9711362B2 patent drawing

AI summary

A semiconductor device of an embodiment includes a first layer, a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer, a source electrode provided on the second layer, a drain electrode provided on the second layer, a gate electrode provided between the source electrode and the drain electrode on the second layer, and a first insulating layer provided between the gate electrode and the drain electrode on the second layer, the first insulating layer being a first oxide of at least one first element selected from the group consisting of Hf, Zr, Ti, Al, La, Y, and Sc, the first insulating layer containing 5×1019 cm−3 or more of at least one second element selected from the group consisting of F, H, D, V, Nb, and Ta.