Normally-Off GaN HEMT With p-SiC Gate Insulator
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Solution Overview
Problem
Conventional GaN power HFETs are typically n-channel normally-ON devices, which is undesirable for many applications that require normally-OFF operation.
Innovation Solution
An insulated-gate field effect transistor design featuring a semiconductor channel layer with a first conductive-type channel, source and drain electrodes, a gate insulator, and a second conductive-type semiconductor film with a higher work function than the channel layer, allowing for normally-OFF operation. This design includes a gate electrode made of a metallic ohmic electrode and optionally a Schottky electrode to prevent hole accumulation and threshold voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional GaN power HFET structure with AlN buffer layer, undoped GaN channel layer and AlGaN layer is used, then the device achieves a threshold voltage of about -6.5V and normally-ON operation, but the device cannot achieve normally-OFF operation which is desired for many applications
Solution Approach 1:
The gate structure is segmented into multiple functional layers: a gate insulator layer (Si3N4 or SiO2) and a second conductive-type semiconductor film (p-type AlGaN or p-type GaN) with higher work function than the channel layer. This segmentation allows independent optimization of each layer's properties to achieve normally-OFF operation while maintaining structural clarity and manufacturability
Solution Approach 2:
The work function parameter of the gate structure is changed by introducing a second conductive-type semiconductor film with higher work function than the channel layer. This parameter change shifts the threshold voltage to positive values, enabling normally-OFF operation. The composition ratio of AlGaN in the second conductive-type film can be adjusted to fine-tune the work function and threshold voltage
2Temperature
If the second conductive-type semiconductor film is fabricated from polycrystalline semiconductor or amorphous semiconductor, then the film can be formed at relatively low temperature, but the manufacturing precision and material quality may be compromised
Solution Approach 1:
The crystalline state parameter of the second conductive-type semiconductor film is changed from single crystal to polycrystalline or amorphous state. This parameter change enables fabrication at relatively low temperatures (below the melting point of the substrate), reducing thermal stress and enabling integration with temperature-sensitive components while maintaining adequate film quality for device operation
Solution Approach 2:
The gate structure uses a composite material system consisting of the gate insulator (Si3N4 or SiO2) combined with the second conductive-type semiconductor film (p-type AlGaN, p-type GaN, or amorphous semiconductor). This composite structure combines the high dielectric constant of the insulator with the high work function of the semiconductor film, achieving both electrical isolation and proper threshold voltage characteristics
3Reliability
If the gate insulator is made of Ta2O5 or silicon nitride with high dielectric constant, then excellent passivation effect and insulation performance are achieved, but the manufacturing complexity and material selection constraints increase
Solution Approach 1:
The dielectric constant parameter of the gate insulator is increased by selecting materials such as Ta2O5 (εr=28) or silicon nitride (εr>3.9) compared to conventional SiO2 (εr=3.9). This parameter change enhances the passivation effect and insulation performance, reducing gate leakage current and improving device reliability, while the deposition processes for these materials are well-established in semiconductor manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables normally-OFF operation by depleting the channel even in a zero-bias state, preventing unintended turning ON and maintaining stable threshold voltage, while improving electron mobility and providing effective passivation with high dielectric constant insulators like Ta2O5 and SiNx.
Implementation Method 1
since the second conductive-type semiconductor film formed on the gate insulator is relatively higher in work function than the semiconductor channel layer, the channel of the semiconductor channel layer is depleted even in its zero-bias state
Implementation Method 2
the gate insulator, which is made of Ta2O5 which has a high relative dielectric constant (∈r=28) and which is excellent as an insulating film, allows a passivation effect to the obtained
Implementation Method 3
the second gate electrode, which is electrically connected to the source ohmic electrode and formed of a Schottky electrode, absorbs holes generated in the semiconductor layer upon occurrence of impact ionization due to high voltages applied to the drain ohmic electrode
Data Source
AI summary
In a heterostructure field effect transistor (MISHFET), a source ohmic electrode 105 and a drain ohmic electrode 106 are formed on an AlGaN barrier layer 104. A SiNx gate insulator 108, a p-type polycrystalline SiC layer 109, and a Pt/Au gate electrode 110 being an ohmic electrode are formed one on another on the AlGaN barrier layer 104. Since the p-type polycrystalline SiC layer 109 is relatively large in work function, the channel of the MISHFET is depleted even in its zero-bias state, so that the normally-OFF operation occurs.