GaN HEMT-Integrated Resistor Layout for Stable High-Voltage Resistance

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Solution Overview

Problem

Existing semiconductor devices using polysilicon resistors face limitations in voltage handling and non-linear resistance changes due to polysilicon depletion, making them unsuitable for high-voltage and high-power applications, especially when integrated with high electron mobility transistors (HEMTs) in AC/DC power conversion circuits.

Innovation Solution

A semiconductor device integrates a resistor with a high electron mobility transistor (HEMT) using a compound semiconductor material cap layer for the resistor in a passive element region, fabricated without additional processes or photomasks, allowing for stable and easily controlled resistance values by adjusting the aspect ratios or meandering shapes of the cap layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If polysilicon resistors are used in Si-based semiconductor devices, then the fabrication process is simple and compatible with existing technology, but the voltage handling capability is limited and resistance values change non-linearly with voltage

Engineering Contradiction:
Improvefabrication process compatibilityVSAvoidvoltage handling capability and resistance stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material parameter from polysilicon to GaN compound semiconductor, fundamentally altering the electrical characteristics to achieve high voltage handling capability and linear resistance behavior while maintaining fabrication compatibility through established GaN growth processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs GaN compound semiconductor materials with specific compositional gradients (varying Al content in AlGaN layers) to create a composite structure that simultaneously achieves high breakdown voltage, controlled resistance values, and compatibility with existing semiconductor fabrication processes

Inventive Principle:
Principle #40Composite materials

2Reliability

If additional processes and photomasks are used to form resistors separately from HEMTs, then the resistor performance can be optimized independently, but the device complexity and manufacturing cost increase

Engineering Contradiction:
Improveresistor performanceVSAvoidnumber of fabrication processes and photomasks
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the resistor formation process with the HEMT fabrication process by using the same GaN cap layer for both structures. The resistor is formed by selectively removing the AlGaN barrier layer in specific regions, allowing both components to be created in the same process sequence without additional photomasks

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The GaN cap layer serves multiple functions: it acts as the cap layer for the HEMT structure and simultaneously forms the resistive element in passive regions. This multi-functionality eliminates the need for separate resistor fabrication processes and reduces overall device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240243121A1Semiconductor device and fabrication method thereof
Publication Date: 2024.07.18 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
  • US20240243121A1 patent drawing
  • US20240243121A1 patent drawing
  • US20240243121A1 patent drawing

AI summary

A semiconductor device includes a substrate having an active element region and a passive element region. A compound semiconductor channel layer, a compound semiconductor barrier layer and a first compound semiconductor cap layer are disposed in sequence on the substrate and located in the active element region. A gate electrode is disposed on the first compound semiconductor cap layer. A source electrode and a drain electrode are disposed on the compound semiconductor barrier layer and located on two opposite sides of the gate electrode, respectively, to construct a high electron mobility transistor. A second compound semiconductor cap layer is disposed on the substrate and located in the passive element region to construct a resistor.