GaN HEMT Stress Transfer Layer for Threshold Stability and Breakdown
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Solution Overview
Problem
GaN-based High Electron Mobility Transistors (HEMTs) face challenges such as high ON-resistance (RON), dynamic RON, threshold voltage instability, and premature device breakdown due to non-uniform electric field distribution, which hinder their widespread adoption in high-power and high-frequency applications.
Innovation Solution
A stress transfer layer with tunable compressive intrinsic stress is engineered to improve GaN-based HEMT performance and reliability by redistributing electric field peaks, passivating the surface, and enhancing threshold voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional GaN-based HEMT structures are used, then high electron mobility is achieved, but dynamic ON-resistance increases and threshold voltage becomes unstable
Solution Approach 1:
A stress transfer layer is introduced as an intermediary between the barrier layer and the surface. This layer transfers mechanical stress to the underlying GaN channel, modulating the two-dimensional electron gas (2DEG) density and thereby controlling threshold voltage stability and reducing dynamic ON-resistance without directly contacting the active channel region.
Solution Approach 2:
The stress transfer layer enables dynamic control of the mechanical stress parameter applied to the GaN channel. By adjusting the stress magnitude and distribution, the 2DEG density and threshold voltage can be tuned to optimize device performance and reduce dynamic ON-resistance under different operating conditions.
2Strength
If field plates are added to redistribute electric field, then breakdown voltage improves, but device complexity increases
Solution Approach 1:
The stress transfer layer extracts and redistributes the mechanical stress field across the device surface, which indirectly modulates the electric field distribution in the channel. This eliminates the need for additional field plates while achieving similar breakdown voltage enhancement through stress-induced 2DEG modulation.
Solution Approach 2:
The patent replaces the traditional electrical field management approach (using field plates) with a mechanical stress management approach. The stress transfer layer uses mechanical stress to control carrier density and electric field distribution, simplifying the device structure while achieving the same breakdown voltage improvement.
3Reliability
If p-GaN gate architecture is used to achieve high positive threshold voltage, then fail-safe operation is enabled, but ON-state gate leakage increases
Solution Approach 1:
The stress transfer layer acts as an intermediary that modulates the threshold voltage through mechanical stress rather than relying solely on p-GaN doping. This reduces the need for high magnesium doping concentrations in the p-GaN gate, thereby reducing gate leakage while maintaining fail-safe operation through controlled stress-induced threshold voltage shifts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress transfer layer reduces dynamic ON-resistance by up to 1000%, increases threshold voltage by 500 mV, and enhances OFF-state breakdown voltage by 100V, providing stable operation under DC and pulsed conditions, suitable for high-frequency power conversions.
Implementation Method 1
The stress transfer layer is configured on the barrier layer of the GaN-based HEMT such that the stress transfer layer transfers the mechanical stress to the barrier layer interface
Implementation Method 2
the stress transfer layer transfers the mechanical stress to the nearby regions while passivating the surface of the barrier layer underneath
Data Source
AI summary
The present disclosure relates to Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) (100) i.e. a semiconductor device (100) which includes a buffer layer (104) formed on the substrate (120). An unintentionally doped (UID) Gallium Nitride (GaN) channel layer (102) is positioned on the buffer layer (104). A barrier layer (106) is formed on the UID channel layer (102) to enable formation of two-dimensional electron gas (2DEG) at interface between UID GaN channel layer (102) and barrier layer (106). A stress transfer layer (116) having tunable intrinsic compressive mechanical stress is deposited on barrier layer (106) to enhance device performance and reliability. Further, the intrinsic stress in the stress transfer layer (116) is tailored to enhance performance in terms of higher threshold voltage and breakdown voltage, and reliability in terms of reduced dynamic RON under DC and switching stress and stable threshold voltage under ON and OFF state gate stress.