GaN HEMT Stress Layer Structure for Higher Carrier Mobility
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Solution Overview
Problem
Existing high electron mobility transistors (HEMTs) fabricated from GaN-based materials face challenges in optimizing carrier mobility and reducing on-resistance and cut-off frequency due to limitations in stress layer configurations.
Innovation Solution
The fabrication method involves forming a compressive stress layer adjacent to one side of the p-type semiconductor layer and a tensile stress layer adjacent to the other side, applying stress to the channel region to enhance carrier mobility and reduce on-resistance and cut-off frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single stress layer configuration is used in existing HEMTs, then the device structure remains simple, but carrier mobility is limited and on-resistance cannot be sufficiently reduced
Solution Approach 1:
The stress layer is segmented into multiple distinct layers: a compressive stress layer and a tensile stress layer, each positioned at different locations relative to the channel region. This segmentation allows independent optimization of stress effects on carrier mobility without requiring a completely new device architecture.
Solution Approach 2:
Different stress characteristics (compressive vs. tensile) are applied to different local regions of the channel. The compressive stress layer is positioned to induce compressive stress in specific channel portions, while the tensile stress layer induces tensile stress in other portions, creating locally optimized conditions for carrier mobility enhancement.
2Reliability
If existing stress layer configurations are used, then manufacturing processes remain straightforward, but on-resistance cannot be reduced by 2.7 times as achieved by the new configuration
Solution Approach 1:
The compressive and tensile stress layers are formed as part of the epitaxial growth process before device operation, preliminarily establishing the desired stress distribution in the channel region. This preliminary action ensures that the stress configuration is built-in during fabrication rather than requiring complex post-processing steps.
Solution Approach 2:
The invention changes the stress state parameters by introducing both compressive and tensile stress layers with specific thicknesses and material compositions. These parameter changes in the stress layer configuration enable the 2.7 times reduction in on-resistance while using standard epitaxial growth techniques.
3Reliability
If conventional HEMT structures are used, then device fabrication is simpler, but cut-off frequency improvement is insufficient
Solution Approach 1:
The stress engineering is extended from a single-dimensional approach (one stress layer) to a multi-dimensional approach with compressive and tensile stress layers positioned at different spatial locations and orientations relative to the channel, enabling enhanced control over carrier transport properties and cut-off frequency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases carrier mobility by approximately 66% and reduces on-resistance by about 2.7 times, while improving the cut-off frequency significantly.
Implementation Method 1
forming a compressive stress layer adjacent to one side of the p-type semiconductor layer, and then forming a tensile stress layer adjacent to another side of the p-type semiconductor layer
Data Source
AI summary
A method for fabricating a high electron mobility transistor (HEMT) includes the steps of first forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, forming a compressive stress layer adjacent to one side of the p-type semiconductor layer, and then forming a tensile stress layer adjacent to another side of the p-type semiconductor layer.