GaN HEMT Two-Step Annealing for Oxide Removal
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Solution Overview
Problem
The challenge in fabricating high electron mobility transistors (HEMTs) on silicon substrates is the low quality surface native oxide, which hinders material electron mobility and device performance due to the larger lattice mismatch between silicon and gallium nitride, leading to suboptimal radio frequency (RF) performance.
Innovation Solution
A two-step annealing process using rapid thermal annealing in forming gas (FG) followed by nitrogen (N2) is employed to remove the native oxide, improving the surface properties of InAlN/GaN HEMTs on silicon substrates, involving epitaxial layer deposition, mesa formation, metal stack deposition, and T-shaped gate formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If in-situ remote plasma pretreatment is used to remove surface native oxide, then surface oxide removal capability is improved, but surface damage increases
Solution Approach 1:
The patent changes the chemical environment parameters by using forming gas (5% H2 in N2) instead of plasma, and controls temperature parameters (700-900°C) to achieve oxide removal through chemical reduction rather than plasma etching, thereby avoiding surface damage while removing native oxide
Solution Approach 2:
The patent uses forming gas (5% H2 in N2) as an inert/reducing atmosphere for annealing, which provides a controlled environment that removes surface oxide through chemical reduction while preventing further oxidation and minimizing surface damage compared to plasma treatment
2Ease of manufacture
If silicon substrate is used instead of silicon carbide substrate, then cost is reduced and scaling capability is improved, but lattice mismatch increases leading to lower material quality
Solution Approach 1:
The patent changes the thermal processing parameters by implementing a two-step annealing process with specific temperature ranges (700-900°C in forming gas, then 750-950°C in N2), which compensates for the lattice mismatch by improving material quality through controlled thermal treatment
Solution Approach 2:
The patent uses inert/reducing atmosphere annealing to improve material quality on silicon substrate by removing surface oxide and reducing defects, thereby compensating for the lattice mismatch between silicon and GaN while maintaining the cost and scaling advantages of silicon substrates
3Ease of manufacture
If surface native oxide is present, then device fabrication is simplified, but electron mobility and device performance deteriorate
Solution Approach 1:
The patent performs preliminary surface treatment through two-step annealing in forming gas and nitrogen atmospheres before subsequent fabrication steps, which removes surface native oxide in advance and improves electron mobility, thereby ensuring high device performance without complicating the overall fabrication process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases two-dimensional electron gas (2DEG) electron density, reduces ohmic contact resistance, and enhances RF performance by minimizing surface damage and unintentional oxidation, resulting in improved subthreshold swing, transconductance, and power gain cutoff frequency.
Implementation Method 1
subjecting the semiconductor layer surface to a rapid thermal annealing (RTA) system for ohmic contact annealing in H2/N2 forming gas
Implementation Method 2
subjecting the semiconductor layer surface to the RTA system for ohmic contact annealing in nitrogen (N2)
Implementation Method 3
subjecting the semiconductor layer surface to an oxygen plasma treatment
Implementation Method 4
depositing an epitaxial layer over a substrate to form a semiconductor layer surface
Data Source
AI summary
A semiconductor device and fabricating method thereof is disclosed. The method comprises depositing epitaxial layers over a silicon substrate to form a semiconductor layer surface; forming at least one mesa portion on the semiconductor layer surface; depositing a metal stack on the semiconductor layer surface; subjecting the semiconductor layer surface to a rapid thermal annealing system for a two-step ohmic contact annealing in H2/N2 forming gas (FG) and then nitrogen; subjecting the semiconductor layer surface to an oxygen plasma treatment; and depositing a T-shaped metal gate on the semiconductor layer surface. A semiconductor device comprises a semiconductor layer surface having an epitaxial layer disposed over a silicon substrate; at least one mesa portion formed on the semiconductor layer surface; a metal stack, disposed on the semiconductor layer surface, and sequentially annealed in FG and nitrogen; and a T-shaped metal gate on the semiconductor layer surface.