GaN HFET Field Plate Stack for Lower Gate-Drain Capacitance
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Solution Overview
Problem
There is a need for semiconductor devices, particularly gallium nitride (GaN) devices, with field plates to reduce gate-drain feedback capacitance and increase breakdown voltage in high-frequency transistors for RF power and power electronics applications, as existing technologies do not effectively address these requirements.
Innovation Solution
A GaN heterojunction field effect transistor (HFET) device is fabricated with a semiconductor substrate, dielectric layers, source and drain electrodes, a gate electrode, and multiple field plates to form metal-insulator-semiconductor regions, which reduce electric field coupling and capacitance, and enhance breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If field plates are added to GaN HFET devices, then breakdown voltage increases and gate-drain feedback capacitance reduces, but device complexity increases
Solution Approach 1:
The patent implements nested field plates where a first field plate is formed over a first dielectric layer, and a second field plate is formed over a second dielectric layer that is disposed over the first field plate. This nested configuration allows multiple field plates to be stacked vertically, reducing gate-drain feedback capacitance and increasing breakdown voltage while minimizing the horizontal space required, thus managing device complexity through vertical integration.
Solution Approach 2:
The patent transitions from traditional planar field plate configurations to a vertical three-dimensional arrangement. By stacking field plates and dielectric layers in the vertical dimension, the patent achieves enhanced breakdown voltage and reduced capacitance without proportionally increasing the device footprint, effectively utilizing the third dimension to resolve the contradiction between performance improvement and complexity management.
2Reliability
If multiple dielectric layers and field plates are implemented, then gate-drain feedback capacitance reduces, but manufacturing complexity increases
Solution Approach 1:
The patent divides the field plate structure into multiple segmented components: a first field plate over a first dielectric layer, and a second field plate over a second dielectric layer. This segmentation allows for modular fabrication processes where each layer can be deposited and patterned separately, enabling better control over capacitance reduction while managing manufacturing complexity through staged production.
Solution Approach 2:
The patent employs preliminary actions in the fabrication sequence by first forming the first dielectric layer and first field plate, then subsequently forming the second dielectric layer and second field plate. This staged approach allows each layer to be optimized independently during manufacturing, reducing the overall gate-drain feedback capacitance while maintaining ease of manufacture through sequential, manageable fabrication steps.
Data Source
AI summary
An embodiment of a semiconductor device includes a semiconductor substrate, a first dielectric layer disposed over the upper surface of the semiconductor substrate, and a first current-carrying electrode and a second current-carrying electrode formed over the semiconductor substrate within openings formed in the first dielectric layer. A control electrode is formed over the semiconductor substrate and disposed between the first current-carrying electrode and a second current-carrying electrode and over the first dielectric layer. A first conductive element is formed over the first dielectric layer, adjacent the control electrode and between the control electrode and the second current-carrying electrode. A second dielectric layer is disposed over the control electrode and over the first conductive element. A second conductive element is disposed over the second dielectric layer and over the first conductive element. An opening in the second dielectric layer couples the first conductive element to the second conductive element.