GaN ICP Etching for Flat-Bottom Trenches Without Micro-Trenching
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Solution Overview
Problem
Current dry etching methods for GaN trenches result in micro-trenching at the corners, leading to charge leakage and limited breakdown voltage in GaN power devices, which is a challenge for achieving high-breakdown-voltage transistors.
Innovation Solution
A dry plasma etch process using an inductively coupled plasma (ICP) etch apparatus with a Cl2 and Argon etch recipe and specific RF power settings to produce a flat-bottomed feature in GaN or GaN alloys, reducing micro-trenching and enhancing device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional dry etching methods are used to etch GaN trenches, then the etching process can be completed, but micro-trenching occurs at the trench corners leading to charge leakage and limited breakdown voltage
Solution Approach 1:
The patent applies parameter changes by modifying the RF power settings during the plasma etching process. Specifically, it uses a two-step RF power approach: initially applying higher RF power to achieve rapid etching, then reducing RF power in later stages to minimize ion bombardment energy at trench corners. This parameter modulation prevents excessive etching at corners while maintaining overall etching efficiency, thereby achieving flat trench corners and reducing charge leakage.
Solution Approach 2:
The patent implements periodic action through a multi-stage etching process with varying RF power levels. The process alternates between high-power stages for bulk material removal and low-power stages for precise corner control. This periodic modulation of etching conditions allows the process to achieve both high etching rates and precise corner flatness, eliminating micro-trenching while maintaining productivity.
2Productivity
If higher RF power is used to increase etching speed, then productivity improves, but micro-trenching at trench corners is exacerbated
Solution Approach 1:
The patent implements periodic action through a multi-stage etching process with varying RF power levels. The process alternates between high-power stages for bulk material removal and low-power stages for precise corner control. This periodic modulation of etching conditions allows the process to achieve both high etching rates and precise corner flatness, eliminating micro-trenching while maintaining productivity.
Solution Approach 2:
The patent applies preliminary action by performing a controlled etching phase at reduced RF power before the main high-power etching stage. This preliminary low-power etching establishes a foundation that prevents excessive corner etching, allowing subsequent high-power stages to achieve rapid material removal without creating micro-trenches. The preliminary action sets up favorable conditions for the main etching process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves a substantially flat bottom surface in GaN trenches, significantly reducing micro-trenching and off-state leakage, enabling the production of high-breakdown-voltage GaN transistors.
Implementation Method 1
performing a plasma etch step using an inductively coupled plasma (ICP) etch apparatus to anisotropically etch the at least one GaN or GaN alloy layer
Data Source
AI summary
Plasma etching a substrate including at least one GaN or GaN alloy layer to form a feature. The plasma etching including providing a substrate with a mask formed thereon, and performing a plasma etch step using an inductively coupled plasma (ICP) etch apparatus to anisotropically etch the at least one GaN or GaN alloy layer through the opening to produce a feature having one or more side walls and a bottom surface, the ICP etch apparatus having an ICP coil and an RF supply which supplies an RF electrical signal to the ICP coil.