GaN-LDMOS Startup Circuit Sequencing for Inrush Suppression
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Solution Overview
Problem
In power converter circuits using GaN N-channel MOS transistors and P-channel LDMOS transistors connected in series, there is an issue with inrush current generation when the main circuit power source is activated, leading to increased terminal capacitance and potential instability due to the need for large-rated diodes to manage standby electricity for maintaining off states, which can result in the P-channel LDMOS transistor entering an on state.
Innovation Solution
An inrush current suppression circuit is designed with a normally-on transistor, a normally-off transistor connected in series, a first drive circuit for the normally-on transistor, a second drive circuit for the normally-off transistor, a diode between the drive circuits, a power source smoothing circuit, and a switch circuit to manage current paths, allowing the transistor switch to be brought into an off state during power source activation and then on state once the insulated power source is activated, thereby forming a current path with minimal capacitance to prevent inrush currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diode with a large rated value is selected to manage standby electricity and inrush current, then the current handling capability is improved, but the terminal capacitance increases and circuit characteristics are degraded
Solution Approach 1:
A switch circuit is introduced as an intermediary component between the power source and the GaN N-channel MOS transistor. This switch circuit controls the timing of power supply, preventing direct connection during startup that would cause inrush current. The mediator allows the system to use a diode with smaller rated value while maintaining reliability, thus resolving the contradiction between current handling capability and terminal capacitance.
Solution Approach 2:
The switch circuit is activated in advance before the main power source is applied to the GaN N-channel MOS transistor. By preliminarily controlling the power supply path and ensuring proper sequencing, the inrush current is prevented from occurring in the first place. This allows the use of diodes with smaller rated values without compromising the system's ability to handle standby electricity and inrush currents.
2Object-generated harmful factors
If the switch circuit is turned off during power source activation, then inrush current is suppressed, but the current path for standby electricity must be carefully managed
Solution Approach 1:
The switch circuit serves as a mediator that selectively controls different current paths. When turned off during power source activation, it blocks the harmful inrush current path through the GaN N-channel MOS transistor. Meanwhile, it allows the standby electricity path through the diode to remain functional. This intermediary control resolves the contradiction by suppressing inrush current while maintaining proper current path management.
3Stability of the object's composition
If the P-channel LDMOS transistor is kept in off state during startup, then circuit stability is improved, but the drive circuit must be properly powered before activation
Solution Approach 1:
The switch circuit is activated in advance to establish the proper power sequencing before the P-channel LDMOS transistor drive circuit is powered. This preliminary action ensures that the drive circuit is properly powered only after the power source is stable, allowing the transistor to remain in off state during startup. This resolves the contradiction by maintaining circuit stability while managing drive circuit power sequencing.
Data Source
AI summary
According to one embodiment, an inrush current suppression circuit includes a normally-on transistor, a normally-off transistor connected in series with the normally-on transistor, a first drive circuit that drives the normally-on transistor, a second drive circuit that drives the normally-off transistor, a diode connected between an output of the first drive circuit and an output terminal of the normally-off transistor, a first power source smoothing circuit that performs smoothing of a source current to be supplied to the first drive circuit and the second drive circuit, and a switch circuit that switches connection/disconnection of a current path passing through the first power source smoothing circuit.