GaN Semiconductor Structure for Low Nanopipe Micro LED Epitaxy
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Solution Overview
Problem
Existing methods for fabricating III-nitride semiconductor structures face challenges in achieving a low density of nano pipes, which are responsible for leakage currents and poor device performance, particularly in micro LEDs, due to the lack of suitable substrates and the need for additional layers to block nano pipe propagation.
Innovation Solution
A method involving the epitaxial growth of a strain-relaxed or unstrained GaN layer on hetero-substrates, such as silicon, followed by an active layer structure, ensures a nano pipe density of 0.1 µm^-2 or less at a distance of 200 nm above the substrate, eliminating the need for additional blocking layers and enhancing crystal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional blocking layers are added to prevent nano pipe propagation, then device performance is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent applies preliminary action by growing a thick GaN buffer layer (3-10 μm) before the active layer structure. This buffer layer is grown in advance to allow nano pipes to terminate within it, preventing them from reaching and damaging the active layer. By performing this protective action beforehand, the patent eliminates the need for additional blocking layers, thus improving device performance while maintaining structural simplicity
Solution Approach 2:
The patent extracts the nano pipe blocking function from the active layer structure and places it entirely in the buffer layer. By separating the protective function from the active device structure, the patent achieves reliable nano pipe suppression without adding complexity to the active layer or requiring additional blocking layers between the buffer and active structures
2Ease of manufacture
If hetero-substrates are used for epitaxial growth, then manufacturing cost is reduced, but nano pipe density increases
Solution Approach 1:
The patent applies parameter changes by optimizing the buffer layer thickness to 3-10 μm, which is significantly thicker than conventional buffer layers. This parameter change allows the buffer layer to effectively terminate nano pipes while maintaining strain relaxation. By changing the thickness parameter, the patent simultaneously achieves cost-effective hetero-substrate usage and low nano pipe density in the active layer
Solution Approach 2:
The patent applies local quality by creating a buffer layer with specific local properties (thick, strain-relaxed) that differ from the active layer structure. The buffer layer is locally optimized to terminate nano pipes through its thickness and strain-relaxed state, while the active layer maintains its own specific properties for device functionality. This local differentiation allows hetero-substrate usage without compromising device performance
3Reliability
If strain-relaxed buffer layer is used, then nano pipe termination is improved, but layer thickness increases
Solution Approach 1:
The patent applies parameter changes by optimizing the buffer layer thickness to a specific range (3-10 μm). By changing the thickness parameter to this optimal range, the patent achieves effective nano pipe termination through strain relaxation while avoiding excessive thickness that would increase manufacturing complexity and cost. The parameter optimization balances both benefits and drawbacks
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in semiconductor structures with significantly reduced nano pipe density, leading to improved performance characteristics like reduced leakage currents and higher internal quantum efficiency, particularly beneficial for micro LEDs and other optoelectronic devices.
Implementation Method 1
epitaxially fabricating above the substrate a substantially strain-relaxed or unstrained GaN layer
Implementation Method 2
a substantially strain-relaxed or unstrained GaN layer
Data Source
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AI summary
The present invention relates to a method of fabricating a semiconductor structure. The method comprises: - providing a hetero-substrate; - epitaxially fabricating above the substrate a substantially strain-relaxed or unstrained GaN layer; and - epitaxially fabricating an active layer structure above the GaN layer, the active layer structure extending along a stacking direction from a lower end face facing towards the substantially strain-relaxed or unstrained GaN layer to an upper end face opposite the lower end face. At a distance that is between 200 nm above the substrate along the stacking direction and the upper end face of the active layer structure, the semiconductor structure has a nano pipe density of 0.1 µm-2 or less, wherein a nano pipe density denotes a density of screw-type or mixed type dislocations having a hollow open core, herein called nano pipes. The present invention also relates to an optoelectronic device such comprising the semiconductor structure. Moreover, the present invention relates to a micro LED.