GaN Package Structure Using Horizontal MOSFET Configuration

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Solution Overview

Problem

The conventional package structure of common-source common-gate gallium nitride field-effect transistors is complex and costly due to the need for a large metal coating and insulating ceramic substrate to connect the drain of a vertical metal oxide semiconductor to the source of a gallium nitride transistor.

Innovation Solution

A package structure using a horizontal semiconductor configuration where the drain of the metal oxide semiconductor is directly connected to the source of the gallium nitride transistor, eliminating the need for a metal coating and ceramic substrate, and simplifying the structure and manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a vertical metal oxide semiconductor is used with a large metal coating to connect the drain to the source of the gallium nitride transistor, then electrical connection is achieved, but the structure becomes complex and manufacturing cost increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidstructure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent inverts the conventional vertical configuration of the metal oxide semiconductor to a horizontal configuration. By rotating the semiconductor orientation from vertical to horizontal, the drain can be directly connected to the source of the gallium nitride transistor without requiring intermediate metal coatings and insulating substrates, thereby simplifying the overall structure while maintaining reliable electrical connection.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If a large metal coating is used to connect the drain of the metal oxide semiconductor to the source of the gallium nitride transistor, then electrical connection is achieved, but manufacturing cost increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates the unnecessary metal coating layer from the conventional structure. By using the horizontal configuration of the metal oxide semiconductor, the direct connection between the drain and the gallium nitride transistor source is achieved without the need for additional metal coating materials and the associated manufacturing processes, thereby reducing manufacturing cost.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If an insulating ceramic substrate is added to isolate the metal coating and lead frame, then electrical isolation is achieved, but the structure and manufacturing process become more complex

Engineering Contradiction:
Improveelectrical isolationVSAvoidstructure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the insulating ceramic substrate from the structure. The horizontal configuration of the metal oxide semiconductor inherently provides the necessary electrical isolation, making the additional ceramic substrate unnecessary. This elimination simplifies both the structure and the manufacturing process while maintaining reliable electrical isolation.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11315864B2Package structure of common-source common-gate gallium nitride field-effect transistor
Publication Date: 2022.04.26 GAN POWER TECH CO LTD
  • US11315864B2 patent drawing
  • US11315864B2 patent drawing

AI summary

A package structure of a common-source common-gate gallium nitride field-effect transistor is disclosed, including a lead frame. A gallium nitride field-effect transistor and a metal oxide semiconductor are directly disposed on the lead frame. The gallium nitride field-effect transistor includes a first matrix directly disposed on the lead frame. A first drain, a first gate, and a first source are disposed on a surface side of the first matrix, and the first drain and the first gate are separately electrically connected to the lead frame. The metal oxide semiconductor includes a second matrix directly disposed on the lead frame. A second drain, a second gate, and a second source are disposed on a surface side of the second matrix, the second drain is directly electrically connected to the first source, and the second gate and the second source are separately electrically connected to the lead frame.