GaN MPS Diode Buffer Layer for High Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power electronics face limitations in achieving high-voltage operation with low capacitance and low leakage current, particularly in GaN-based devices due to thickness constraints and high defect densities when using foreign substrates.
Innovation Solution
The development of merged P-i-N Schottky (MPS) diodes using gallium-nitride (GaN) based epitaxial layers, which allow for thicker semiconductor layers and superior switching characteristics by incorporating p-type and n-type GaN regions with a Schottky contact, enabling high-voltage operation with low off-state leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GaN-based devices use foreign substrates, then manufacturing is easier, but thickness is constrained and defect density increases
Solution Approach 1:
The patent uses a buffer layer as an intermediary between the foreign substrate and the GaN epitaxial layer. This buffer layer mediates the lattice mismatch and thermal expansion differences, enabling thicker GaN layers to be grown with reduced defect densities while maintaining compatibility with foreign substrates like silicon or sapphire.
Solution Approach 2:
The patent employs parameter changes in the epitaxial growth process, including controlling temperature, pressure, and composition gradients during the growth of GaN layers on foreign substrates. By optimizing these parameters, the patent achieves reduced defect densities and enables thicker layer growth, resolving the contradiction between ease of manufacture and reliability.
2Ease of manufacture
If GaN-based devices use foreign substrates, then manufacturing is easier, but thickness is constrained
Solution Approach 1:
The buffer layer acts as an intermediary that enables thicker GaN epitaxial layers to be grown on foreign substrates. It accommodates the lattice mismatch and thermal stress, allowing the GaN layer thickness to exceed what would be possible without the buffer, thus resolving the thickness constraint while maintaining ease of manufacture on foreign substrates.
Solution Approach 2:
The patent utilizes parameter changes during epitaxial growth, such as varying temperature profiles and composition gradients, to enable controlled growth of thicker GaN layers on foreign substrates. These parameter optimizations allow the GaN layer to achieve greater thickness without compromising the integrity of the foreign substrate interface.
3Device complexity
If conventional diode structures are used, then manufacturing is simpler, but switching speed and leakage current performance are inferior
Solution Approach 1:
The patent merges the P-i-N diode structure with Schottky contact geometry to create the MPS diode. This combination integrates the low capacitance advantage of Schottky diodes with the low forward voltage drop of P-i-N diodes, achieving superior switching speed and reduced leakage current while maintaining reasonable manufacturing complexity through shared fabrication processes.
Solution Approach 2:
The patent employs composite material structures combining p-type, intrinsic, and n-type GaN regions with Schottky metal contacts. This composite structure leverages the beneficial electrical properties of each region and contact type to achieve high switching speed and low leakage current, overcoming the limitations of conventional single-structure diodes.
4Device complexity
If conventional diode structures are used, then device complexity is lower, but off-state leakage current is higher
Solution Approach 1:
The patent merges P-i-N and Schottky diode structures to create the MPS diode, which combines the low forward voltage characteristics of P-i-N diodes with the low off-state leakage current特性 of Schottky diodes. This merged structure achieves reduced leakage current while maintaining manageable device complexity through integrated fabrication processes.
Solution Approach 2:
The composite material structure of p-type, intrinsic, and n-type GaN regions with Schottky contacts creates a device that benefits from both P-i-N and Schottky characteristics. The specific combination reduces off-state leakage current by leveraging the high barrier height of the Schottky contact while maintaining the low forward voltage drop of the P-i-N structure.
Data Source
AI summary
A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.