GaN Power Module Positive Gate Control via NMOS Intermediary

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Solution Overview

Problem

Power modules equipped with depletion GaN transistors face challenges in controlling the gate due to the need for negative voltage generation and excessive parasitic capacitance changes during turn-on and turn-off, leading to increased losses.

Innovation Solution

A power module design incorporating a gallium nitride transistor, an NMOS transistor, a first capacitor, a first diode, and a second diode, where the NMOS transistor is connected to the gallium nitride transistor, and the capacitor and diodes are used to eliminate the need for negative voltage input and manage parasitic capacitance changes, allowing for efficient high-frequency switching without excessive loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If depletion GaN transistor is used for high-frequency switching, then switching frequency is improved, but negative voltage control is required which increases device complexity

Engineering Contradiction:
Improveswitching frequencyVSAvoidnegative voltage generation
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent introduces an NMOS transistor as an intermediary device between the control circuit and the depletion GaN transistor. The NMOS transistor's gate is controlled by a positive voltage signal, and it in turn controls the gate of the depletion GaN transistor, effectively converting the positive voltage control signal into the required negative voltage pulse for the GaN transistor without requiring a dedicated negative voltage generation circuit.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If LDMOS is combined with depletion GaN transistor to enable positive voltage control, then ease of operation is improved, but parasitic capacitance change increases causing energy loss

Engineering Contradiction:
Improvegate control voltageVSAvoidpower loss
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent extracts the LDMOS device from the configuration and replaces it with an NMOS transistor. This extraction eliminates the excessive parasitic capacitance changes associated with LDMOS during switching transitions, thereby reducing the energy loss while maintaining the ability to control the depletion GaN transistor using positive voltage signals.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of energy

If NMOS transistor is used instead of LDMOS, then energy loss is reduced, but device structure changes requiring redesign

Engineering Contradiction:
Improvepower lossVSAvoiddevice structure
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The patent changes the key parameter of the control transistor from LDMOS to NMOS. This parameter change reduces the parasitic capacitance effects and associated energy losses. While the device structure does change, the NMOS transistor is a standard component that can be integrated using conventional manufacturing processes, making the transition feasible despite the structural modification.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230143658A1Power module
Publication Date: 2023.05.11 NAT YANG MING CHIAO TUNG UNIV
  • US20230143658A1 patent drawing
  • US20230143658A1 patent drawing
  • US20230143658A1 patent drawing

AI summary

A power module includes: a GaN transistor, an NMOS transistor, a first capacitor, a first diode and a second diode. The NMOS transistor is electrically connected to the GaN transistor. A negative electrode of the first capacitor is electrically connected to an anode of the first diode and a gate of the GaN transistor. A cathode of the second diode is electrically connected to a gate of the NMOS transistor. The power module further includes a power module control terminal electrically connected to an anode of the first capacitor and an anode of the second diode.