GaN Power Package Base Layout for Low Thermal Resistance

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Solution Overview

Problem

Existing electronic packages for high-frequency and high-power density GaN-based semiconductor devices face challenges in achieving low thermal resistance and low inductance coupling to circuit boards, which is essential for efficient heat dissipation and performance.

Innovation Solution

The development of electronic packages with a metallic package base partially covered with a dielectric encapsulant, featuring a die-attach pad electrically isolated from source terminals, allows for direct coupling to a circuit board's ground plane, thereby achieving low thermal resistance and internal current sensing circuits to replace external sense resistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a conventional electronic package structure is used for GaN-based semiconductor devices, then the device can be packaged, but the thermal resistance is high and heat dissipation is inefficient

Engineering Contradiction:
Improvethermal resistanceVSAvoidheat dissipation efficiency
Core Design Contradiction:
TemperatureVSLoss of energy

Solution Approach 1:

The package structure is segmented into distinct functional zones: a first region with the die attach pad for thermal conduction, a second region with source terminals for electrical connection, and a third region with the encapsulant for protection. This segmentation allows the die attach pad to be electrically isolated from source terminals while maintaining thermal coupling to the substrate, resolving the contradiction between electrical isolation and thermal management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The substrate acts as an intermediary element between the die attach pad and the external environment. The die attach pad is coupled to the substrate, which provides a thermal pathway for heat dissipation while maintaining electrical isolation. This intermediary structure enables low thermal resistance without compromising electrical performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the die attach pad is electrically connected to source terminals, then electrical connection is simplified, but thermal management performance deteriorates

Engineering Contradiction:
Improveelectrical connection complexityVSAvoidthermal resistance
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The package structure is divided into distinct functional regions: a first region containing the die attach pad for thermal conduction, and a second region containing source terminals for electrical connection. The die attach pad is electrically isolated from the source terminals by spacing and dielectric layers, allowing independent optimization of thermal and electrical pathways without compromising either function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the package are assigned different functional qualities: the die attach pad region is optimized for thermal conduction with high thermal conductivity materials, while the source terminal region is optimized for electrical connection. The dielectric layers and spacing provide electrical isolation while allowing thermal energy to conduct through the substrate, creating local quality differentiation that resolves the contradiction.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If external sense resistors are used for current sensing, then current measurement is achieved, but the package size and complexity increase

Engineering Contradiction:
Improvecurrent sensing capabilityVSAvoidpackage structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The current sensing function is merged into the package structure itself through the formation of a sensing circuit region that integrates with the existing substrate and terminal structure. The sense resistor is incorporated within the package footprint, combining the current sensing function with the power device packaging, thereby eliminating the need for separate external sense resistors and reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate and package structure serve multiple functions simultaneously: providing mechanical support, enabling thermal conduction, facilitating electrical isolation, and incorporating current sensing capability. The sensing circuit region is designed to work alongside the power device terminals, allowing the same package structure to fulfill both power handling and measurement functions without requiring additional external components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables efficient heat dissipation and improved thermal management for GaN-based semiconductor devices, reducing thermal impedance and enhancing the overall performance and reliability of the electronic packages.

Implementation Method 1

enables efficient heat dissipation and improved thermal management for GaN-based semiconductor devices, reducing thermal impedance

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12334421B2Thermally enhanced electronic packages for GaN power integrated circuits
Publication Date: 2025.06.17 NAVITAS SEMICON LTD
  • US12334421B2 patent drawing
  • US12334421B2 patent drawing
  • US12334421B2 patent drawing

AI summary

An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.