GaN Composite Passivation Layout for TDDB and Dynamic RDSOn

Solution Overview

Problem

GaN transistors experience increased effective On-state resistance (current collapse or dynamic RDSOn) and Time-Dependent Dielectric Breakdown (TDDB) due to charge trapping and defect formation under high voltage and frequency operation, compromising device performance.

Innovation Solution

A method involving a combination of two distinct surface passivation processes, optimized for different performance parameters, is applied to GaN devices. The first process optimizes TDDB near the gate region, while the second optimizes RDSOn near the drain access region, using Low-Pressure Chemical Vapor Deposition (LPCVD) with varying O2 levels and vacuum pressures to form composite passivation layers without additional mask layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single surface passivation process is used, then the device structure is simple, but both TDDB and RDSOn performance cannot be optimized simultaneously

Engineering Contradiction:

Improvedevice reliabilityVSAvoidpassivation structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The passivation layer is segmented into multiple portions (first passivation layer portion and second passivation layer portion) that are laterally adjacent to each other. Each portion is formed by a different passivation process optimized for specific performance parameters, allowing simultaneous optimization of TDDB and RDSOn without requiring a completely complex multi-layer structure

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the device receive different passivation treatments optimized for their specific functional requirements. The first passivation process optimizes TDDB in regions where dielectric breakdown is a concern, while the second passivation process optimizes RDSOn in regions where on-state resistance is critical, achieving local quality optimization across the device

Inventive Principle:

Principle #3Local quality

2Reliability

If a passivation process optimized for TDDB is used, then dielectric breakdown resistance improves, but RDSOn performance deteriorates

Engineering Contradiction:

ImproveTDDB performanceVSAvoidRDSOn performance

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The passivation structure is divided into laterally adjacent portions, with the first passivation layer portion formed by a process optimized for TDDB and the second passivation layer portion formed by a process optimized for RDSOn. This segmentation allows each region to benefit from its specialized passivation treatment without compromising the other performance parameter

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different passivation processes are applied to different lateral regions of the device based on their specific performance requirements. Regions prone to dielectric breakdown receive TDDB-optimized passivation, while regions critical for on-state conduction receive RDSOn-optimized passivation, achieving local quality optimization

Inventive Principle:

Principle #3Local quality

3Manufacturing precision

If a passivation process optimized for RDSOn is used, then on-state resistance improves, but TDDB performance deteriorates

Engineering Contradiction:

ImproveRDSOn performanceVSAvoidTDDB performance

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The passivation structure is divided into laterally adjacent portions, with the first passivation layer portion formed by a process optimized for TDDB and the second passivation layer portion formed by a process optimized for RDSOn. This segmentation allows each region to benefit from its specialized passivation treatment without compromising the other performance parameter

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different passivation processes are applied to different lateral regions of the device based on their specific performance requirements. Regions prone to dielectric breakdown receive TDDB-optimized passivation, while regions critical for on-state conduction receive RDSOn-optimized passivation, achieving local quality optimization

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances device reliability by optimizing both TDDB and RDSOn performance simultaneously, reducing the tradeoff between these parameters and improving overall device stability and efficiency.

Implementation Method 1

In some implementations, the first and second processes may each comprise a Low-Pressure Chemical Vapor Deposition (LPCVD) process

Methodology Applied

Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Data Source

PatentUS20260018405A1Gallium nitride device having a combination of surface passivation layers

Publication Date: 2026.01.15 TEXAS INSTRUMENTS INC

AI summary

A method of fabricating a semiconductor device includes providing a GaN substrate with an epitaxial layer formed thereover, the epitaxial layer forming a heterojunction with the GaN substrate, the heterojunction supporting a 2-dimensional electron gas (2DEG) channel in the GaN substrate. A composite surface passivation layer is formed over a top surface of the epitaxial layer, wherein the composite surface passivation layer comprises a first passivation layer portion formed proximate to a first region of the GaN device and a second passivation layer portion formed proximate to a second region of the GaN device. The first and second passivation layer portions are disposed laterally adjacent to each other over the epitaxial layer, wherein the first passivation layer portion is formed in a first process and the second passivation layer portion is formed in a second process.