GaN Transistors With Polysilicon Layers for P-Channel Components
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Solution Overview
Problem
The existing fabrication processes for gallium nitride (GaN) devices struggle to create integrated circuits with both active and passive silicon components, particularly due to difficulties in forming p-channel transistors and other silicon devices due to poor hole mobility in gallium nitride and limitations in manufacturing multiple enhancement mode devices on a chip.
Innovation Solution
The integration of polysilicon layers with n-type and p-type regions within an insulating material, along with metal interconnects and vias, to form active and passive components in GaN integrated circuits, allowing for the creation of additional components such as p-channel transistors, diodes, and capacitors, and enabling the fabrication of both n-channel and p-channel MOSFETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional GaN fabrication processes are used, then n-channel transistors can be fabricated with high electron mobility, but p-channel transistors and other silicon components cannot be created due to poor hole mobility in gallium nitride
Solution Approach 1:
The patent introduces polysilicon layers as an intermediary material within the GaN device structure. These polysilicon layers serve as mediators to create p-type regions and other silicon components that would otherwise be impossible to form in pure GaN due to poor hole mobility. The polysilicon acts as a bridge between the GaN heterostructure and silicon-based device functionality.
Solution Approach 2:
The invention creates a composite structure combining GaN layers with polysilicon layers. This composite material approach allows the device to leverage the high electron mobility and high voltage capabilities of GaN while simultaneously incorporating the hole-conducting properties of polysilicon to enable p-channel transistors and other silicon components.
2Ease of operation
If enhancement mode devices are fabricated in GaN, then safety and control are improved, but the ability to create integrated circuits with both n-channel and p-channel transistors is limited
Solution Approach 1:
The patent creates a universal platform that can host multiple device types (n-channel enhancement mode devices, p-channel devices, diodes, capacitors, and other silicon components) within a single integrated circuit. The polysilicon integration methodology provides multi-functionality, allowing the same fabrication process to create diverse device types with different operating modes and characteristics.
3Adaptability or versatility
If polysilicon layers are integrated into the GaN structure, then additional components such as p-channel transistors and diodes can be created, but device structure complexity increases
Solution Approach 1:
The patent segments the device structure into distinct functional regions: GaN heterostructure regions for high electron mobility devices, and polysilicon-based regions for p-channel devices and other silicon components. This segmentation allows each material system to be optimized for its specific function while maintaining overall device integration.
Solution Approach 2:
The invention adds a material composition dimension to the device structure by incorporating polysilicon layers at specific positions within the GaN heterostructure. This dimensional addition in material space enables new device functionalities without fundamentally altering the vertical layering approach, thus managing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the manufacturing of GaN integrated circuits that include both n-channel and p-channel transistors, diodes, and other silicon components, enhancing the functionality and versatility of GaN devices by overcoming the limitations of poor hole mobility and single enhancement mode device fabrication.
Implementation Method 1
The different material in the adjacent nitride layers also causes polarization, which contributes to a conductive two dimensional electron gas (2DEG) region near the junction of the two layers
Implementation Method 2
one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions
Data Source
AI summary
A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.