GaN Power Device Superlattice Structure for Gate Leakage Control
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Solution Overview
Problem
GaN-based power electronic devices face issues with high gate leakage and current collapse at high voltages, leading to increased dynamic on-resistance and power consumption, which are not adequately addressed by existing technologies such as the P—(Al)GaN cap layer technique.
Innovation Solution
A GaN-based power electronic device structure incorporating a GaN-based heterostructure layer, a superlattice structure layer, and a P-type cap layer, where the superlattice structure layer is inserted between the heterostructure and the P-type cap layer to increase the barrier height and inhibit gate leakage, and is used as a stopping layer during dry etching to improve uniformity and production yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a P-type cap layer is grown on the Al(In,Ga)N/GaN heterostructure to deplete the 2 DEG and achieve enhancement-mode operation, then the threshold voltage is raised to +1.5V, but forward leakage current increases very quickly when gate voltage is above forward turn-on voltage, possibly leading to gate breakdown
Solution Approach 1:
An AlN/GaN superlattice layer is introduced as an intermediary between the P-type cap layer and the Al(In,Ga)N/GaN heterostructure. This superlattice layer acts as a mediator that provides additional barrier height to suppress forward leakage current while maintaining the enhancement-mode operation achieved by the P-type cap layer. The superlattice structure creates a more effective potential barrier without compromising the depletion of 2 DEG in the channel.
2Reliability
If the Al(In,Ga)N barrier layer is thinned by gate trench etching to reduce 2 DEG density, then enhancement-mode operation is achieved, but the manufacturing process becomes more complex and threshold voltage control becomes more difficult
Solution Approach 1:
The solution extracts the threshold control function from the barrier layer thickness and relocates it to the P-type cap layer. By growing a P-type cap layer on top of the intact Al(In,Ga)N barrier layer, the depletion of 2 DEG is achieved through the P-type doping rather than barrier layer thinning. This eliminates the need for complex gate trench etching processes while maintaining enhancement-mode operation and improving threshold voltage control.
3Reliability
If a thick P-type cap layer is grown to ensure complete depletion of 2 DEG, then enhancement-mode operation is achieved, but gate leakage current increases and safe gate voltage range is reduced
Solution Approach 1:
The structure combines multiple materials with different properties: the AlN/GaN superlattice layer provides a composite structure with alternating high and low bandgap regions. This composite superlattice layer creates a more effective barrier against leakage current while allowing the P-type cap layer to maintain enhancement-mode operation. The composite structure optimizes both depletion efficiency and leakage suppression.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively inhibits forward and reverse gate leakage, extends the safe gate voltage range, and facilitates self-recovery from current collapse, reducing dynamic on-resistance and promoting the industrialization of GaN-based power electronic devices.
Implementation Method 1
the superlattice structure layer is inserted between the heterostructure and the P-type cap layer to increase the barrier height and inhibit gate leakage
Implementation Method 2
The P—(Al)GaN cap layer technique depletes the 2 DEG in a channel of the Al(In,Ga)N/GaN heterostructure by utilizing the space-charge region effect of a PN-junction
Implementation Method 3
relying on strong spontaneous piezoelectric polarization effect between Al(In,Ga)N barrier layers and GaN buffer layers, a two-dimensional electron gas (2 DEG) with a density of up to 1013 cm−2 will be induced
Data Source
AI summary
A GaN-based power electronic device and a method for manufacturing the same is provided. The GaN-based power electronic device comprising a substrate and an epitaxial layer over the substrate. The epitaxial layer comprises a GaN-based heterostructure layer, a superlattice structure layer and a P-type cap layer. The superlattice structure layer is provided over the heterostructure layer, and the P-type cap layer is provided over the superlattice structure layer. By using this electronic device, gate voltage swing and safe gate voltage range of the GaN-based power electronic device manufactured on the basis of the P-type cap layer technique may be further extended, and dynamic characteristics of the device may be improved. Therefore, application process for the GaN-based power electronic device that is based on the P-type cap layer technique will be promoted.