GaN Cap Layer Recesses for Current Collapse Suppression

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Solution Overview

Problem

Conventional GaN-based semiconductor devices face a trade-off between high frequency characteristics and current collapse phenomena, where thickening the GaN cap layer to suppress current collapse increases contact resistance and deteriorates high frequency performance.

Innovation Solution

A semiconductor device with a GaN cap layer having nitrogen polarity and recesses formed in it, where the gate, source, and drain electrodes are placed within these recesses, allowing for thickening of the cap layer without increasing element resistance, thus maintaining high frequency characteristics while suppressing current collapse.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the GaN cap layer is thickened to suppress current collapse phenomenon, then current collapse suppression is improved, but contact resistance increases and high frequency characteristic deteriorates

Engineering Contradiction:
Improvecurrent collapse suppressionVSAvoidhigh frequency characteristic
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces a vertical recess structure into the GaN cap layer, transforming the electrode formation from a planar surface interaction to a three-dimensional structure. The recesses penetrate through the GaN cap layer to reach the AlGaN electron travel layer, allowing electrodes to make contact at a deeper level while maintaining a thick GaN cap layer for current collapse suppression. This dimensional change resolves the contradiction by enabling both thick cap layer and low contact resistance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The electrode structures are nested within the recesses formed in the GaN cap layer. The recesses contain the electrodes, which are positioned within the etched cavities rather than on the surface. This nesting approach allows the electrodes to access the conductive layer beneath while the GaN cap layer remains intact and thick, simultaneously achieving current collapse suppression and low contact resistance.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the GaN cap layer is thickened to suppress current collapse phenomenon, then current collapse suppression is improved, but element resistance increases

Engineering Contradiction:
Improvecurrent collapse suppressionVSAvoidelement resistance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

By creating vertical recesses through the GaN cap layer, the patent establishes a shorter electrical path from the electrode to the conductive AlGaN layer. The recesses reduce the thickness of the GaN cap layer that the current must traverse, thereby reducing element resistance while maintaining the overall thickness of the GaN cap layer for current collapse suppression.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The electrodes are nested within the recesses, positioning them in direct contact with or near the AlGaN electron travel layer. This nesting configuration minimizes the resistive path through the GaN cap layer while preserving the cap layer's thickness for suppressing current collapse, thus resolving the resistance contradiction.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS10777643B2Method for manufacturing semiconductor device
Publication Date: 2020.09.15 MITSUBISHI ELECTRIC CORP
  • US10777643B2 patent drawing
  • US10777643B2 patent drawing

AI summary

A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.