GaN Recess Gate via Nitrogen Layer Selective Etching
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Solution Overview
Problem
Conventional compound semiconductor devices face challenges in achieving a normally-off type with high accuracy manufacturing due to difficulties in selective etching and high gate leakage current, which affects their suitability for high-voltage applications like cellular phone base station amplifiers.
Innovation Solution
A GaN-based carrier transit and supply layers are formed on a semiconductor substrate, with a GaN protective layer and a nitrogen-containing semiconductor layer, and an insulator layer is introduced between the gate and source/drain electrodes, using wet etching to create openings for the electrodes, allowing for precise gate electrode formation and reducing gate leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a recess gate structure is adopted to make the threshold voltage positive, then the device can operate in normally-off mode, but it becomes difficult to manufacture with high accuracy due to lack of selective etching
Solution Approach 1:
A compound semiconductor layer containing nitrogen is introduced as an intermediary layer between the gate electrode and the source/drain electrodes. This layer enables selective wet etching to form the recess gate structure with high precision, solving the manufacturing accuracy problem while maintaining the normally-off operation capability.
Solution Approach 2:
The invention changes the chemical composition parameter of the semiconductor layer by incorporating nitrogen into the compound semiconductor layer. This parameter change enables selective etching behavior, allowing precise formation of the recess gate structure that was previously unachievable with standard GaN layers.
2Device complexity
If the gate electrode is in direct contact with the n-type GaN layer, then the device structure is simple, but high gate leakage current flows in saturation region when input power is large
Solution Approach 1:
The compound semiconductor layer containing nitrogen serves as an intermediary barrier layer between the gate electrode and the n-type GaN layer. This intermediate layer effectively reduces gate leakage current in the saturation region while maintaining reasonable device structure complexity.
3Object-generated harmful factors
If an insulator layer is inserted between the n-type GaN layer and gate electrode to reduce gate leakage current, then gate leak current decreases, but threshold voltage becomes deep and cannot be made positive
Solution Approach 1:
Instead of using a conventional insulator layer, the invention changes the material parameter by using a compound semiconductor layer containing nitrogen. This layer has different etching properties that enable selective removal to form recess gates, while its electrical properties allow threshold voltage to remain positive, unlike conventional insulators.
Solution Approach 2:
The invention uses a composite structure where the compound semiconductor layer containing nitrogen is integrated with the GaN-based heterostructure. This composite material approach combines the benefits of selective etching capability with appropriate electrical characteristics for threshold voltage control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of a compound semiconductor device with a threshold voltage close to zero, improved transconductance, and high withstand voltage, effectively addressing the issues of current collapse and gate leakage, and ensuring reliable operation in high-power states.
Implementation Method 1
a process of the compound semiconductor layer can be performed under a condition free from an influence on the protective layer. Accordingly, it is possible to construct a gate recess structure with high reproducibility.
Data Source
AI summary
An AlN layer (2), a GaN buffer layer (3), a non-doped AlGaN layer (4a), an n-type AlGaN layer (4b), an n-type GaN layer (5), a non-doped AlN layer (6) and an SiN layer (7) are sequentially formed on an SiC substrate (1). At least three openings are formed in the non-doped AlN layer (6) and the SiN layer (7), and a source electrode (8a), a drain electrode (8b) and a gate electrode (19) are evaporated in these openings.