GaN FET Relay Driver Circuit With Split Gate Supply
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Solution Overview
Problem
Existing driver circuits for GaN transistors in solid state relays cannot effectively turn the gate fully off, leading to inefficiencies in controlling AC and DC loads.
Innovation Solution
A driver circuit utilizing a split power supply with a positive and negative voltage output to control GaN FETs, incorporating a control transistor to prevent conduction when off, and a cascaded embodiment to increase blocking voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a MOSFET with intrinsic anti-parallel diode is used for DC switching, then the device can conduct current in one direction, but it cannot block voltage in both directions required for AC operation
Solution Approach 1:
The patent divides the single MOSFET into two separate MOSFETs arranged back-to-back, with each MOSFET handling one polarity of the AC voltage. This segmentation allows each device to block voltage in its respective direction while maintaining simplicity in the overall circuit configuration.
Solution Approach 2:
The patent transitions from unidirectional current handling to bidirectional voltage blocking by arranging MOSFETs in a back-to-back configuration, adding the dimension of bidirectional operation capability to the switching device.
2Ease of operation
If a voltage-doubler rectifier circuit is used to provide gate drive voltage, then sufficient turn-on voltage can be achieved, but the circuit cannot effectively turn off GaN FETs which require negative gate voltage
Solution Approach 1:
Instead of using a voltage-doubler rectifier that only provides positive voltage, the patent inverts the approach by using a split power supply configuration with a center-tapped transformer that provides both positive and negative gate drive voltages, enabling effective GaN FET turn-off.
Solution Approach 2:
The patent changes the voltage parameter of the gate drive circuit from unipolar (positive only) to bipolar (positive and negative), allowing the gate voltage to swing between positive values for turn-on and negative values for turn-off, which is essential for GaN FET operation.
3Strength
If a single stage SSR is used, then the circuit is simple, but the blocking voltage is limited by the single MOSFET or GaN FET breakdown voltage
Solution Approach 1:
The patent implements a cascaded SSR architecture where multiple SSR stages are nested within each other, with each stage contributing to the overall blocking voltage. This nesting approach allows the system to achieve high voltage blocking capability while maintaining a modular and relatively simple circuit structure.
Solution Approach 2:
The patent transitions from a single-stage to a multi-stage cascaded architecture, adding the dimension of series-connected voltage blocking stages, which multiplies the overall blocking voltage capability while keeping each individual stage relatively simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively controls GaN FETs by ensuring full gate turn-off and enhances blocking voltage, providing a low-cost solution for solid state relay applications.
Implementation Method 1
The positive supply of the split power supply provides a voltage for application to the gate of a FET 304 for supplying power to a load. The negative supply of the split power supply provides a negative voltage for turning off a control transistor 306.
Implementation Method 2
The control transistor prevents the FET from conducting power to the load when the driver circuit is turned off.
Implementation Method 3
The driver circuit is provided in a cascaded embodiment to increase the blocking voltage of the solid-state relay.
Data Source
AI summary
A driver circuit for a solid-state relay which includes a split power supply. The positive supply of the split power supply provides a voltage for application to the gate of a power FET for supplying power to a load. The negative supply of the split power supply provides a negative voltage for turning off a control transistor. The control transistor prevents the power FET from conducting power to the load when the driver circuit is turned off. The circuit is particularly adapted for driving a power GaN FET solid state relay. The circuit is provided in a cascaded embodiment to increase the blocking voltage of the solid-state relay.