III-Nitride Power Conversion Circuit with Segmented Transistors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power conversion circuits using silicon MOSFETs face challenges in achieving high efficiency when integrating III-nitride transistors, particularly due to the lack of a PMOS analogue, which affects the design of efficient gate drivers and output stages.
Innovation Solution
The implementation of a highly efficient III-nitride power conversion circuit utilizing GaN HEMTs for both gate drivers and output stages, along with segmented III-nitride transistors and selector circuits to enhance efficiency, and the inclusion of cascaded inverters with cutoff switches to prevent unnecessary current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If III-nitride transistors are used in power conversion circuits, then high frequency switching capability and high current carrying capability are improved, but the lack of PMOS analogue makes it challenging to provide highly efficient gate driver
Solution Approach 1:
The gate driver is divided into multiple cascaded inverters, each with specific functionality. The first inverter generates an initial signal, the second inverter receives this signal and generates a driven signal, and additional inverters can be cascaded for further signal conditioning. This segmentation allows complex gate driving functionality to be achieved through simpler, modular inverter stages without requiring a PMOS analogue.
2Loss of energy
If conventional silicon MOSFETs are used, then PMOS and NMOS transistors can form highly efficient circuits, but III-nitride transistors have enhanced performance characteristics for power applications
Solution Approach 1:
The patent changes the material parameter from silicon to III-nitride, which fundamentally alters the transistor characteristics. III-nitride transistors provide higher breakdown voltage, higher current density, and higher switching frequency capability compared to silicon MOSFETs. The design adapts to these parameter changes by using cascaded inverter structures that are optimized for III-nitride device characteristics rather than trying to replicate silicon CMOS architectures.
Solution Approach 2:
The cascaded inverter structure serves multiple functions: signal generation, signal amplification, gate driving, and power management. Each inverter stage can be configured to perform different functions depending on the circuit requirements, providing versatility without requiring separate PMOS and NMOS transistor types. The universal inverter building block can be implemented using only III-nitride enhancement mode transistors.
3Speed
If III-nitride transistors are used for high frequency switching, then switching capability is improved, but power consumption may increase without proper efficiency optimization
Solution Approach 1:
The gate driver uses periodic switching of the enhancement mode transistors to drive the power switches. The cascaded inverters are designed to switch periodically at the required frequency, with each inverter stage turning on and off in sequence. This periodic action enables high frequency switching capability while the efficient III-nitride transistor implementation minimizes power loss during switching transitions.
Data Source
AI summary
According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor.