GaN Semiconductor Annealing for Hydrogen Removal

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Solution Overview

Problem

Existing semiconductor devices face challenges such as insufficient hole concentration due to hydrogen inclusion during the growth of P-type GaN layers, leading to increased manufacturing costs and inefficiencies, which are common across semiconductor devices using GaN layers.

Innovation Solution

A manufacturing method involving dry etching to expose the P-type semiconductor layer, followed by an annealing process in an oxygen atmosphere, efficiently removes hydrogen atoms without the need for wet etching, enhancing hole concentration and reducing manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dry etching is performed to remove H from the P-type GaN layer, then H removal is achieved, but wet etching is also required which increases manufacturing cost and process complexity

Engineering Contradiction:
Improvehole concentrationVSAvoidetching process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates the wet etching step from the conventional two-step etching process (dry etching followed by wet etching). By using a selective dry etching method that targets only the N-type GaN layer while preserving the P-type GaN layer, the patent removes the need for subsequent wet etching, thereby simplifying the manufacturing process while maintaining effective H removal capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention applies local quality by making the etching process selective to specific layer types. The dry etching conditions are optimized to etch the N-type GaN layer (which contains harmful H) while leaving the P-type GaN layer (which needs to preserve its structure) unaffected. This spatial and material selectivity allows differential treatment of different regions/layers within the semiconductor structure

Inventive Principle:
Principle #3Local quality

2Reliability

If conventional dry etching followed by wet etching is used to remove H, then H removal is effective, but manufacturing cost increases

Engineering Contradiction:
Improvehole concentrationVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The invention extracts and eliminates the wet etching step from the conventional two-step etching process (dry etching followed by wet etching). By using a selective dry etching method that targets only the N-type GaN layer while preserving the P-type GaN layer, the patent removes the need for subsequent wet etching, thereby simplifying the manufacturing process while maintaining effective H removal capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention applies local quality by making the etching process selective to specific layer types. The dry etching conditions are optimized to etch the N-type GaN layer (which contains harmful H) while leaving the P-type GaN layer (which needs to preserve its structure) unaffected. This spatial and material selectivity allows differential treatment of different regions/layers within the semiconductor structure

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If H is included during P-type GaN layer growth, then layer formation is complete, but hole concentration becomes insufficient

Engineering Contradiction:
Improvelayer completenessVSAvoidhole concentration
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention applies preliminary action by performing selective removal of the N-type GaN layer (containing harmful H) before final device assembly. By etching away the N-type layer that contains H while preserving the P-type layer, the patent prevents H from migrating into the P-type region during subsequent processing, thereby ensuring adequate hole concentration from the outset

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention converts the harmful presence of H in the N-type GaN layer into a beneficial selective etching target. By designing the etching process to specifically remove H-containing N-type material while preserving the P-type layer, the patent transforms the H contamination problem into a selective removal opportunity, improving overall device performance

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively enhances the electrical properties of the P-type semiconductor layer by improving hole concentration while reducing manufacturing costs and simplifying the production process.

Implementation Method 1

a annealing process of annealing the P-type semiconductor layer in an atmosphere containing oxygen, after the dry etching process

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

annealing the P-type semiconductor layer in an atmosphere containing oxygen

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS9431260B2Semiconductor device and manufacturing method of the same
Publication Date: 2016.08.30 TOYODA GOSEI CO LTD
  • US9431260B2 patent drawing
  • US9431260B2 patent drawing
  • US9431260B2 patent drawing

AI summary

There is provided a manufacturing method of a semiconductor device having an N-type semiconductor layer on a P-type semiconductor layer. The manufacturing method comprises: a dry etching process of performing dry etching to go through the N-type semiconductor layer in a thickness direction and make the plane in the thickness direction of the P-type semiconductor layer exposed; and a annealing process of annealing the P-type semiconductor layer in an atmosphere containing oxygen, after the dry etching process. This manufacturing method improves the electrical properties of the P-type semiconductor layer.