GaN-on-Si Wafer with AlGaN Buffer for Defect Control
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Solution Overview
Problem
The challenge is to minimize dislocation defects and bowing in semiconductor wafers used for light emitting diodes (LEDs) due to lattice mismatches and thermal expansion differences between substrate and overlying layers, which limits the size of wafers that can be manufactured cost-effectively and results in high defect levels.
Innovation Solution
A semiconductor wafer structure comprising a silicon substrate with an AlN layer, a first AIGaN layer, a second AIGaN layer, and a GaN layer, where the first AIGaN layer has a high aluminum concentration and the second AIGaN layer has a lower aluminum concentration, with crystalline GaN islands between them, allowing for reduced threading dislocations and stress management without the need for SiNx interlayers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If large diameter wafers are used for manufacturing, then productivity and cost-effectiveness are improved, but wafer bowing and cracking increase due to lattice mismatch and thermal expansion differences
Solution Approach 1:
The patent introduces an intermediate AlGaN layer between the silicon substrate and the GaN device layers. This intermediary layer acts as a buffer that gradually transitions the lattice mismatch between Si and GaN, reducing thermal stress and preventing wafer bowing and cracking during high-volume manufacturing of large diameter wafers
Solution Approach 2:
The patent modifies the compositional parameter of the buffer layer by using AlGaN with varying aluminum content. By changing the aluminum concentration in the AlGaN layer, the lattice constant is adjusted to provide a gradual transition from Si to GaN, thereby reducing mismatch-induced stress and enabling reliable large wafer fabrication
2Reliability
If compositionally graded layers are grown to reduce dislocations, then threading dislocation density is reduced, but manufacturing complexity and process time increase
Solution Approach 1:
The patent employs a composite buffer structure consisting of AlN and AlGaN layers with different compositions. This composite approach combines the advantages of both materials: AlN provides strong lattice matching to Si, while AlGaN provides a gradual compositional transition to GaN, effectively reducing threading dislocation density without requiring excessively complex graded structures
3Reliability
If discontinuous passivation interlayers are deposited to reduce dislocations, then dislocation density is reduced, but the number of manufacturing steps and process complexity increase
Solution Approach 1:
The patent extracts and eliminates the need for discontinuous SiNx passivation interlayers by using a continuous AlGaN buffer layer instead. This simplifies the manufacturing process by removing multiple deposition and patterning steps while still achieving effective dislocation reduction through the compositional gradient in the AlGaN layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure enables the growth of crack-free, low-defect GaN layers on silicon substrates, reducing wafer bowing and cracking, and allowing for larger wafer sizes with improved efficiency and reduced production costs.
Implementation Method 1
lattice mismatches between dissimilar layers. This can arise simply due to different lattice parameters and/or due to thermal contraction at different rates following growth at elevated temperatures
Implementation Method 2
thermal contraction at different rates following growth at elevated temperatures
Implementation Method 3
mismatched lattice parameters and thermal expansion coefficients, particularly where the difference lies between the substrate and the overlying layers
Implementation Method 4
deposit a discontinuous passivation interlayer of a material, such as SiN x , and then an island growth layer of GaN or InGaN on the SiN x interlayer to bend the dislocations
Implementation Method 5
The layers are grown by a metalorganic vapour phase epitaxy process
Data Source
Figure 1~2(a)
Figure 2(b)
Figure 3(a)~3(b)
AI summary
The present invention relates to a semiconductor wafer comprising: a substrate; a first Al Ga N layer on the substrate; a second Al Ga N layer on the first Al Ga N layer; a Ga N layer on the second Al Ga N layer; and a plurality of crystalline Ga N islands between the first and second Al Ga N layers.