GaN-on-Si Heterointegration via AlN Buffer and Segmented Growth
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Solution Overview
Problem
The challenge in growing high-quality GaN epitaxial layers on silicon substrates is exacerbated by lattice constant and thermal expansion coefficient mismatches, leading to numerous defects in GaN-Si semiconductor devices, which deteriorate their performance.
Innovation Solution
The method involves selective area growth (SEG) on a silicon substrate with a (111) crystal surface, using an AlN buffer layer and silicon-doped GaN epitaxial layers, where silicon atoms are doped into the GaN to control dislocation defects and improve epitaxial quality, achieved through a process involving oxide layer patterning, reactive-ion etching, and metal organic chemical-vapor deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GaN epitaxial layer is grown on silicon substrate using conventional methods, then manufacturing cost is reduced, but lattice defects increase due to mismatch in lattice constant and thermal expansion coefficient
Solution Approach 1:
The patent divides the growth area into discrete regions by forming isolation grooves that segment the silicon substrate surface. This segmentation prevents lateral expansion of the GaN layer and confines dislocation propagation, thereby improving epitaxial quality while maintaining cost-effectiveness of silicon substrate usage
Solution Approach 2:
The patent introduces an AlN buffer layer as an intermediary between the silicon substrate and the GaN epitaxial layer. This buffer layer serves as a transition medium that accommodates lattice mismatch and thermal expansion differences, reducing dislocation density and improving the overall epitaxial quality
2Ease of manufacture
If GaN is grown on silicon substrate, then manufacturing cost is reduced and power characteristics are improved, but dislocation defects deteriorate device characteristics
Solution Approach 1:
Isolation grooves are etched into the silicon substrate to segment the growth areas, confining dislocation propagation within isolated regions. This prevents dislocations from spreading across the entire device area, thereby maintaining device reliability while using cost-effective silicon substrates
Solution Approach 2:
The AlN buffer layer acts as an intermediary that filters and reduces dislocation density before the GaN epitaxial layer is grown. This mediator layer protects the subsequent GaN layer from direct exposure to substrate-induced defects, improving device characteristics
3Manufacturing precision
If selective area growth is used on (111) crystal surface, then dislocation defects are reduced and epitaxial quality is improved, but process complexity increases
Solution Approach 1:
The patent performs preliminary actions by pre-forming isolation grooves and depositing the AlN buffer layer before growing the GaN epitaxial layer. These preparatory steps create a controlled environment that guides subsequent growth, improving epitaxial quality while using well-established fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly enhances the crystallinity of the GaN epitaxial layer, reduces dislocation defects, and controls vertical leakage current, resulting in improved performance for GaN-Si semiconductor devices, suitable for high-frequency and high-power applications.
Implementation Method 1
growing an oxide layer on the main surface
Implementation Method 2
using reactive-ion etching (RIE) to etch the silicon substrate
Implementation Method 3
using plasma enhanced chemical vapor deposition (PECVD) to grow a nitride layer
Implementation Method 4
using inductively coupled plasma (ICP) to remove the nitride layer on a bottom wall
Implementation Method 5
using metal organic chemical-vapor deposition (MOCVD) to sequentially grow an AlN buffer layer and a GaN epitaxial layer
Data Source
AI summary
A semiconductor structure having a Si substrate heterointegrated with GaN and a method for fabricating the same is disclosed. The method uses a (100) silicon substrate to fabricate a hundred nanometer scale hole and uses wet etching to etch the silicon substrate, thereby exposing the (111) crystal surface of the silicon substrate. The (111) crystal surface is used as a nucleating crystal surface of an AlN buffer layer and GaN. When GaN is grown, silane is reacted with GaN to adjust the concentration of doping silicon atoms into GaN, thereby forming a semiconductor structure having a Si substrate heterointegrated with GaN.