Insulated GaN-on-Si Substrate Layout to Limit Current Collapse
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Solution Overview
Problem
Microelectronic devices with AlGaN/GaN heterojunctions suffer from current collapse due to electron trapping in the buffer and passivation layers, leading to increased dynamic on-state resistance and power losses, particularly in monolithic half-bridge structures where maintaining zero potential difference between the source and substrate is not feasible, resulting in inefficient power conversion and high voltage limitations.
Innovation Solution
A microelectronic device with a silicon substrate featuring electric voltage maintenance stacks forming P-N junctions between the substrate and the active layers of transistors or diodes, allowing for independent control of the rear face potential of each component, thereby preventing electron trapping and current collapse, and enabling efficient high-voltage operation without the thermal and cost drawbacks of silicon-on-insulator solutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a monolithic half-bridge configuration with GaN-on-Si heterojunctions is used, then high current density and power conversion efficiency are improved, but current collapse due to electron trapping increases leading to higher dynamic resistance and power losses
Solution Approach 1:
The invention divides the substrate into electrically isolated regions using insulating structures (trenches filled with dielectric material). Each active component (transistor or diode) is positioned in its own isolated region, preventing electron trapping at the substrate interface from affecting all components uniformly. This segmentation resolves the current collapse issue while maintaining high power conversion efficiency.
Solution Approach 2:
The invention introduces an intermediate insulating layer between the GaN heterojunction and the silicon substrate. This intermediate layer acts as a mediator that prevents direct electron transfer to the substrate, thereby reducing electron trapping and the associated current collapse effect, while still allowing effective power conversion.
2Reliability
If SOI substrates are used to reduce electron trapping, then current collapse is limited, but manufacturing cost increases and thermal efficiency decreases
Solution Approach 1:
The invention replaces expensive SOI substrates with a conventional silicon substrate combined with localized insulating structures. Instead of using a costly fully insulated substrate, the solution uses targeted, simpler insulating trenches only where needed to prevent electron trapping, significantly reducing manufacturing cost while maintaining reliability.
Solution Approach 2:
The invention applies insulating structures only in specific local regions beneath individual active components rather than insulating the entire substrate. This localized approach maintains the thermal and electrical benefits of the silicon substrate while providing sufficient isolation to prevent current collapse, avoiding the need for expensive full SOI substrates.
3Reliability
If SOI substrates are used to isolate components from the substrate, then electron trapping is reduced, but thermal conduction decreases leading to overheating issues
Solution Approach 1:
The insulating structures are segmented into localized trenches beneath individual components rather than a continuous insulating layer. This segmentation allows heat to dissipate through the substrate in multiple paths around the insulating regions, maintaining thermal conduction while still providing sufficient electrical isolation to reduce electron trapping.
Solution Approach 2:
The invention provides electrical isolation only where strictly necessary (beneath the active components) while maintaining direct thermal contact between the GaN layer and the silicon substrate in the surrounding areas. This localized isolation approach preserves the superior thermal conduction properties of silicon while achieving the needed electron trapping reduction.
4Reliability
If the substrate is electrically connected to the source electrode to prevent electron trapping, then current collapse is reduced for single components, but monolithic half-bridge configurations cannot be implemented
Solution Approach 1:
The invention segments the substrate into electrically isolated regions, allowing each component to have its own independent electrical reference. This enables the implementation of monolithic half-bridge configurations where multiple components can be integrated on the same substrate without electrical interference, while each component still benefits from protection against electron trapping through its own insulating region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The P-N junctions effectively maintain the rear face potential of each component close to its source electrode, reducing current collapse and enabling high-power, high-voltage operation while avoiding the thermal and cost issues of silicon-on-insulator solutions, thus enhancing the performance and reliability of GaN-on-Si microelectronic devices.
Implementation Method 1
a first layer (101, 201) and a second layer (102, 202) which extend over one another, the first layer being located under the second layer, between the second layer and the substrate, the first layer being made from said first semiconductor material, with a doping, p or n, of the same type as for the substrate, whereas the second layer is made from said first semiconductor material, with a doping, n or p, of a type opposite to the doping of the substrate
Implementation Method 2
A two-dimensional electron gas (2DEG) is formed at the interface 13′ between the AlGaN layer and the GaN layer. This two-dimensional electron gas serves as a conduction channel in heterojunction electronic components
Data Source
AI summary
A micro-electronic device includes a first electronic component and a second electronic component, and a substrate formed of a first semiconductor material for supporting the components. The first component and the second component each include an active layer formed at least partially from a second semiconductor material different from the first semiconductor material. The device further includes, for each of the components, a stack for maintaining electrical voltage, which stack is situated between the substrate and the active layer of the electronic component under consideration and which comprises two layers forming a junction P-N formed from the same semiconductor material as the substrate and which insulates the relevant active layer from the substrate. The assemblies respectively including the first component and the second component and their respective stack for maintaining electrical voltage are separated from each other by a barrier made of electrically insulating material.