GaN-on-SiC Epiwafers for Lower ACP Spurs and EVM
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuit power amplifiers, particularly those using gallium nitride (GaN) materials, face performance drawbacks due to unwanted traps and distortions in semiconductor wafers, leading to elevated adjacent channel power (ACP) spurs and error vector magnitude (EVM) issues in RF transmission applications.
Innovation Solution
The use of a silicon carbide (SiC) substrate with a gallium nitride (GaN) layer thicker than 600 nm, devoid of intentional iron or carbon doping, reduces threading dislocation defect densities and associated traps, resulting in improved amplifier performance by minimizing ACP spurs and EVM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional prior art epiwafers are used, then manufacturing is easier and cost is lower, but ACP spurs and EVM performance deteriorate
Solution Approach 1:
The patent applies parameter changes by precisely controlling the iron concentration parameter in the GaN layer, setting it to less than 1×10^16 atoms/cm³, and controlling the layer thickness parameter to greater than 600 nm. These parameter optimizations reduce threading dislocation defect densities and associated traps, thereby minimizing ACP spurs and improving EVM performance while maintaining manufacturing feasibility
Solution Approach 2:
The patent implements local quality by creating specific regions with controlled iron concentrations and thicknesses within the epiwafer structure. The GaN layer is engineered with uniform low iron concentration throughout, while the overall epiwafer structure includes multiple layers (nucleation, barrier, cap) with different compositions and properties optimized for their specific functions, resulting in improved signal quality
2Object-affected harmful factors
If iron doping is increased to reduce parasitic leakage, then leakage control improves, but threading dislocation defect densities increase causing more traps
Solution Approach 1:
The patent resolves this contradiction by optimizing the iron concentration parameter to a specific range (less than 1×10^16 atoms/cm³) and the layer thickness parameter (greater than 600 nm). This parameter optimization achieves the dual benefit of controlling parasitic leakage while minimizing threading dislocation defect densities, thereby reducing traps and improving overall device performance
Solution Approach 2:
The patent converts the potentially harmful effect of iron doping into a beneficial outcome by using very low concentrations of iron (less than 1×10^16 atoms/cm³) to control parasitic leakage without generating excessive threading dislocation defects. The controlled iron presence becomes beneficial for leakage management while the low concentration prevents harmful defect formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the linearized performance of power amplifiers by reducing parasitic leakage and maintaining acceptable leakage levels, leading to improved signal quality and reliability in mobile communication systems.
Implementation Method 1
A semiconductor wafer including epitaxially-grown layers can be referred to as an epiwafer. An epiwafer can include a number of different layers formed over a base substrate of silicon (Si), silicon carbide (SiC), sapphire (Al2O3), or other base materials.
Data Source
AI summary
A number of different types of semiconductor material structures and wafers, including epiwafers, are described herein. The semiconductor material wafers are optimized in certain aspects to form transistor amplifiers for use with new modulation communications systems. A semiconductor material wafer includes a silicon carbide substrate and at least one III-nitride material layer over the silicon carbide substrate. The semiconductor material wafers can include layers consisting of semiconductor materials without dopants such as iron or carbon, formed over the silicon carbide substrate.


