GaN Semiconductor Substrate Thinning via Backside Grinding
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Solution Overview
Problem
The existing methods for thinning silicon substrates used in gallium nitride semiconductor devices, such as backside grinding, often result in excessive bending and potential breakage due to lattice mismatch stress between silicon and gallium nitride crystals, leading to device failure and reduced flexural strength.
Innovation Solution
A manufacturing method that involves grinding, polishing, and etching the backside surface of the semiconductor substrate to reduce its thickness to one-fifth or less, using diamond abrasive grains and chemical mechanical polishing to minimize grinding traces and relieve stress, thereby preventing substrate bending and breakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If backside grinding is performed on silicon substrate to thin the semiconductor device, then device miniaturization and heat transfer are improved, but substrate bending and breakage occur due to lattice mismatch stress
Solution Approach 1:
The patent changes the physical-chemical parameters of the substrate surface by introducing controlled defects and modifying the crystal structure through ion implantation and thermal processing. This transforms the substrate's mechanical properties, allowing it to maintain strength while being thinned. The parameter change involves altering the substrate's internal stress distribution and defect density to prevent bending during thinning operations.
Solution Approach 2:
The patent performs preliminary strengthening treatments on the silicon substrate before thinning operations. This includes ion implantation and thermal processing to pre-establish a defect structure that will prevent bending during subsequent grinding and thinning. The preliminary action prepares the substrate to withstand the thinning process without excessive bending or breakage.
2Volume of moving object
If backside grinding is performed to reduce substrate thickness, then device compactness is improved, but substrate bending increases due to heat generated during grinding
Solution Approach 1:
The patent modifies the substrate's thermal and mechanical parameters through ion implantation and thermal processing. This creates a modified layer with different thermal expansion characteristics and improved mechanical properties, reducing the substrate's tendency to bend when heated during grinding operations. The parameter changes make the substrate more dimensionally stable under thermal load.
Solution Approach 2:
The patent introduces controlled defects and modifies the substrate structure in advance to cushion against the thermal stresses generated during grinding. The pre-established defect structure acts as a buffer that absorbs thermal expansion stresses, preventing excessive bending and maintaining substrate flatness during the thinning process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces substrate bending and breakage risk, enhances flexural strength, and achieves thinning of semiconductor devices, resulting in a more stable and compact semiconductor package.
Implementation Method 1
grinding, polishing, and etching the backside surface of the semiconductor substrate to reduce its thickness
Implementation Method 2
using diamond abrasive grains and chemical mechanical polishing to minimize grinding traces
Implementation Method 3
grinding, polishing, and etching the backside surface of the semiconductor substrate to reduce its thickness
Data Source
AI summary
A method of forming a semiconductor device including a semiconductor substrate having a first surface and a second surface, and having a gallium nitride-containing layer provided on the first surface of the semiconductor substrate includes grinding, polishing, and etching the second surface of the semiconductor substrate of which a thickness is d1, and reducing the thickness of the semiconductor substrate to one-fifth or less of d1.