GaN Switch Integrated Pulldown Circuit Against False Turn-On
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Solution Overview
Problem
Gallium Nitride (GaN) based switches, particularly Gate Injection Transistors (GITs), are susceptible to unintentional turning on due to noise or voltage perturbations, requiring complex gate-drive circuitry with negative voltages that slow switching speed, introduce inconsistencies, and increase losses.
Innovation Solution
A failsafe pulldown circuit integrated with the power switch on the same semiconductor die, using a normally-on pulldown transistor and pulldown control circuit to autonomously apply and discharge a negative voltage, preventing unintended turning on without relying on negative gate voltage, thus simplifying the driver circuitry and reducing parasitic inductances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex gate-drive circuitry with negative voltage is used to prevent unintended turning on, then reliability is improved, but device complexity increases and switching speed decreases
Solution Approach 1:
The patent integrates the pulldown transistor and control circuit directly into the power switch device structure, merging previously separate gate-drive components into a unified device. This integration eliminates the need for external complex gate-drive circuitry while maintaining the failsafe pulldown function, thereby reducing device complexity without compromising reliability
Solution Approach 2:
The integrated control circuit autonomously manages the pulldown transistor operation based on the state of the main switch, eliminating the need for external control signals or complex gate-drive management. The device self-regulates the pulldown function, simplifying the overall system while ensuring reliable prevention of unintended turning on
2Reliability
If complex gate-drive circuitry with negative voltage is used to prevent unintended turning on, then reliability is improved, but switching speed decreases
Solution Approach 1:
The patent extracts and eliminates the negative voltage generation and application functions from the gate-drive circuitry, retaining only the essential pulldown function through an integrated transistor. This removal of unnecessary complex circuitry reduces voltage swing requirements and eliminates associated delays, thereby improving switching speed while maintaining reliability through the simplified pulldown mechanism
3Device complexity
If integrated failsafe pulldown circuit is used, then device complexity is reduced, but ensuring reliable holding in non-conducting state becomes more challenging
Solution Approach 1:
The integrated pulldown transistor is configured to actively pull the gate voltage down to the source potential during the off-state, creating a preliminary counter-action against any noise or voltage perturbations that might attempt to turn on the switch. This proactive voltage clamping ensures reliable holding in the non-conducting state while using simpler circuitry compared to external negative voltage approaches
4Object-affected harmful factors
If integrated failsafe pulldown circuit is used, then parasitic inductances are reduced, but circuit design complexity increases
Solution Approach 1:
By integrating the pulldown transistor and control circuit within the same device structure as the main power switch, the patent minimizes the physical separation between components. This merging eliminates external connections and associated parasitic inductances, while the integrated nature of the circuit actually simplifies the overall design by reducing the number of discrete components and interconnections required
Data Source
AI summary
Circuits and devices are provided for reliably holding a normally-off Gallium Nitride (GaN) power transistor, such as a Gate Injection Transistor (GIT), in a non-conducting state when a gate of the power transistor is not driven with an active (turn-on) control signal. This is accomplished by coupling a normally-on pulldown transistor between the gate and the source of the power transistor, such that the pulldown transistor shorts the gate to the source when the power transistor is not set for its conducting state. The pulldown transistor is preferably located on the same semiconductor die as, and in close proximity to, the power transistor, so as to avoid spurious noise at the power transistor gate that may unintentionally turn on the power transistor. A pulldown control circuit is coupled to the gate of the pulldown transistor and autonomously turns off the pulldown transistor when the power transistor is set to conduct.


