GaN Switch Shunt Configuration for Insertion Loss
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Solution Overview
Problem
High-power GaN-based transistors face challenges with high insertion loss and poor isolation due to high contact resistance and parasitic capacitance, which are exacerbated by the need for larger transistors to handle high-power signals.
Innovation Solution
Configuring GaN-based transistors in a shunt configuration with transmission lines, where each transistor has a terminal coupled to the transmission line and another to ground, allowing for selective coupling and decoupling based on control signals, and incorporating quarter-wavelength connection lengths to enhance isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a larger GaN-based FET is used to overcome high contact resistance and reduce insertion loss, then insertion loss is reduced, but parasitic capacitance increases resulting in poor isolation when the transistor is turned off
Solution Approach 1:
The patent divides the switching function into two separate transistors: one dedicated to reducing insertion loss when on, and another dedicated to providing isolation when off. This segmentation allows each transistor to be optimized for its specific function rather than requiring a single large transistor to handle both requirements simultaneously.
Solution Approach 2:
Instead of using a series configuration where the transistor directly blocks the signal path when off, the patent uses a shunt configuration where the transistor shunts signal to ground when on. This inversion of the conventional switching approach allows the parasitic capacitance to work in favor of isolation rather than against it.
2Power
If GaN-based FETs are used to handle high-power signals, then power handling capability is improved, but high contact resistance causes high insertion loss
Solution Approach 1:
The patent combines multiple GaN-based FETs in a shunt configuration to achieve the desired power handling capability while compensating for the high contact resistance of individual devices. The parallel combination of multiple transistors reduces the overall contact resistance and insertion loss while maintaining high power handling capability.
3Speed
If GaN-based FETs are used in switching applications, then switching speed is improved, but parasitic capacitance causes poor isolation when the switch is closed
Solution Approach 1:
The patent introduces a shunt configuration with ground connection as an intermediary element. This configuration uses the ground reference to provide a stable reference potential that improves isolation between switched states, while the fast switching characteristics of GaN-based FETs are preserved.
Data Source
AI summary
Devices and systems for using a Gallium Nitride-based (GaN-based) transistor for selectively switching signals are provided. A first transmission line is configured to connect a common connection and a first connection. A first Gallium-Nitride-based (GaN-based) transistor has a first terminal coupled to the first transmission line at a first point, a second terminal coupled to a relative ground, and a third terminal configured to be coupled to a first control connection. A second GaN-based transistor has a first terminal coupled to the first transmission line at a second point, a second terminal configured to be coupled to the relative ground, and a third terminal configured to be coupled to the first control connection.