GaN Transistor Layout with Active Area I/O Ports
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Solution Overview
Problem
Existing transistor layouts consume a significant portion of the die area due to bond pad areas, which is undesirable for reducing die cost, area, volume, and weight, especially in cost-sensitive GaN-based RF power amplifier designs where physical die area is a concern.
Innovation Solution
The transistor layout positions input and output ports within the active region between input, output, and common fingers, utilizing gaps between fingers to create input and output ports, and includes through-substrate via connections to maintain source-to-drain pitch without increasing die size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If bond pads are positioned outside the active region, then electrical connection is achieved, but die area consumption increases
Solution Approach 1:
The patent repositions bond pads from the traditional location outside the active region to within the active region, utilizing the vertical dimension of the transistor structure. This allows bond pads to be formed in the same planar area as the transistor fingers, effectively using previously wasted space and reducing overall die area consumption.
Solution Approach 2:
The patent merges the function of bond pads with the active region by positioning them within the same area. The bond pads are integrated into the transistor structure between the source and drain fingers, combining what were previously separate functional elements into a unified design that reduces total area.
2Area of stationary object
If bond pads are positioned within the active region, then die area is reduced, but electrical isolation becomes more difficult
Solution Approach 1:
The patent segments the bond pad structure by positioning different bond pads (input, output, common) in distinct locations within the active region, separated by the transistor fingers themselves. The source fingers act as natural isolation barriers between adjacent bond pads, providing electrical isolation without requiring additional isolation structures.
Solution Approach 2:
The source fingers serve as intermediary elements that provide electrical isolation between the input and output bond pads. These fingers are positioned between the bond pads and naturally prevent direct electrical coupling, acting as a mediator that maintains isolation while allowing compact positioning.
3Area of stationary object
If traditional transistor layout is used, then manufacturing is simplified, but die cost increases due to larger area
Solution Approach 1:
The patent creates a universal transistor layout where the active region serves multiple functions: it contains the transistor fingers for current conduction and simultaneously houses the bond pads for electrical connection. This multi-functional design eliminates the need for separate bond pad areas, reducing die area while maintaining manufacturability through standard fabrication processes.
Data Source
AI summary
A semiconductor device includes an active region formed in a substrate. The active region includes input fingers, output fingers, and common fingers disposed within the substrate and oriented substantially parallel to one another. An input port is electrically connected to the input fingers and an output port is electrically connected to the output fingers. A common region is electrically connected to the common fingers. At least one of the input and output ports is positioned within the active region between the input, output, and common fingers. The common region is interposed between a pair of the common fingers such that the common fingers of the pair are spaced apart by a gap, and at least one of the input and output ports is position in the gap.