GaN Integrated Circuit with Variable Drain-to-Source Distances
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Solution Overview
Problem
Current DC-DC converter technologies face challenges in integrating multiple voltage ranges due to the complexity of fabricating different types of switches, leading to inefficient use of IC fabrication technology and the need for multiple IC dies or packages for wide voltage applications.
Innovation Solution
The development of an integrated circuit with multiple sets of GaN transistors of varying drain-to-source distances, allowing for increased voltage conversion ranges by combining different sizes of GaN transistors in a single substrate, along with control circuitry and passive components, to create efficient and compact DC-DC converter devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple types of switches are used to handle different voltage ranges, then the voltage conversion range is improved, but the device complexity and fabrication difficulty increase
Solution Approach 1:
The patent applies local quality by creating different regions on the same semiconductor substrate with different GaN layer thicknesses. Each region has locally optimized transistor characteristics (different drain-to-source distances) suited for specific voltage ranges, allowing a single device to handle multiple voltage levels without requiring different switch types or complex fabrication processes.
Solution Approach 2:
The invention makes a single GaN HEMT device universal by enabling it to operate across multiple voltage ranges. By integrating multiple transistor sets with different characteristics on one substrate, the device can function as both high-voltage and low-voltage switches, eliminating the need for separate IC dies or packages for different voltage applications.
2Ease of manufacture
If separate IC dies are used for different voltage ranges, then the fabrication process is simplified, but the device size and integration efficiency increase
Solution Approach 1:
The patent merges multiple transistor sets that would traditionally require separate IC dies into a single integrated device. By combining high-voltage and low-voltage GaN transistors on one substrate with unified fabrication processes, the invention reduces the overall device footprint while maintaining ease of manufacture through standard IC fabrication techniques.
Solution Approach 2:
The invention resolves the size-integration conflict by transitioning to a lateral transistor architecture where transistors are arranged side-by-side on the substrate plane rather than stacking vertically. This dimensional arrangement allows multiple transistor sets with different characteristics to coexist on a single chip without increasing vertical complexity, achieving high integration density.
3Adaptability or versatility
If GaN transistors with different drain-to-source distances are integrated, then the voltage handling capability is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent segments the GaN layer into multiple regions with different thicknesses during the fabrication process. Each segment corresponds to a specific voltage range requirement, allowing precise control of drain-to-source distances for different transistor sets while using standard semiconductor fabrication techniques like selective epitaxial growth or selective removal methods.
Data Source
AI summary
An integrated circuit that includes a plurality of GaN transistor sets. A first set of the plurality of GaN transistor sets includes transistors with a first drain-to-source distance, and wherein a second of the plurality of GaN transistor sets includes transistors with a second drain-to-source distance that is greater than the first drain-to-source distance.