GaN Power Transistor Structure for Flat Electric Field Control
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Solution Overview
Problem
Conventional silicon-based semiconductor devices face limitations in on-state resistance versus breakdown voltage, and wide bandgap semiconductor materials-based power transistors have issues with independent control of threshold voltage and on-state resistance, leading to reliability concerns and performance sacrifices.
Innovation Solution
A semiconductor structure comprising a silicon base substrate layer, transition layer, gallium nitride buffer layer, aluminium gallium nitride barrier layers, and p-doped gallium nitride layers, which reduces electric field peaks and achieves flat electric field distribution, improving breakdown voltage and reliability without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional silicon-based semiconductor technology is used, then manufacturing is easier and cost is lower, but on-state resistance versus breakdown voltage performance is limited
Solution Approach 1:
The patent employs a composite material structure combining silicon substrate with gallium nitride (GaN) and aluminium gallium nitride (AlGaN) layers to achieve superior electrical performance. The GaN/AlGaN heterostructure enables higher breakdown voltage and lower on-state resistance compared to conventional silicon, while the composite design allows independent control of threshold voltage and on-state resistance through separate layer optimization
Solution Approach 2:
The invention applies local quality by creating laterally varying doping profiles in the drift region with p-type doped vertical stripes forming PN-junctions. This local modification achieves flat electric field distribution through lateral depletion, enabling the super junction concept to surpass conventional silicon limits while maintaining manufacturability
2Reliability
If wide bandgap semiconductor materials are used to improve performance, then breakdown voltage and switching speed improve, but threshold voltage and on-state resistance cannot be controlled independently leading to reliability issues
Solution Approach 1:
The patent segments the barrier function into multiple distinct layers: a first AlGaN barrier layer and a second AlGaN barrier layer separated by a p-doped GaN layer. This segmentation allows independent optimization of each layer's thickness and composition, enabling separate control of threshold voltage (via the first barrier) and on-state resistance (via the second barrier), thereby resolving the fundamental limitation of single-barrier structures
Solution Approach 2:
The p-doped GaN layer acts as an intermediary between the two AlGaN barrier layers, providing electrical connection while enabling independent control of the barrier properties. This intermediate layer allows the first and second AlGaN layers to be optimized independently for threshold voltage and on-state resistance respectively, without compromising device reliability
3Reliability
If wide bandgap semiconductor materials are used to reduce on-state resistance, then conductivity improves, but threshold voltage decreases leading to increased off-state leakage and spurious turn-on
Solution Approach 1:
By dividing the barrier structure into two separate AlGaN layers with different thicknesses and compositions, the patent enables independent optimization: the first AlGaN layer is designed to provide sufficient threshold voltage to prevent off-state leakage and spurious turn-on, while the second AlGaN layer is optimized to minimize on-state resistance. This segmentation resolves the trade-off between threshold voltage and on-state resistance
Solution Approach 2:
The invention utilizes parameter changes by varying the thickness and aluminium composition of each AlGaN barrier layer. The first AlGaN layer has specific parameters optimized for threshold voltage control, while the second AlGaN layer has different parameters optimized for low on-state resistance. This parameter optimization across multiple layers enables simultaneous achievement of high reliability and low conduction loss
4Reliability
If complex field plate design is used to mitigate high electric field at gate-drain edge, then reliability improves, but device dimensions increase and performance is sacrificed
Solution Approach 1:
The patent achieves electric field management through parameter optimization of the GaN channel layer thickness and AlGaN barrier layer properties, rather than extending device dimensions with field plates. By carefully controlling the thickness of the GaN channel layer (e.g., 3-10 nm) and the aluminium composition of the barrier layers, the invention naturally reduces peak electric field at the gate-drain edge, maintaining compact device dimensions while improving reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure enables enhanced high voltage operation with improved reliability and reduced device dimensions, maintaining performance while addressing reliability concerns.
Implementation Method 1
p-type doped vertical stripes are added in a drift region of the semiconductor device, which results in the formation of new PN-junctions. The super junction concept allows achieving a flat electric field distribution in the semiconductor device due to lateral depletion of an adjacent PN-junction
Implementation Method 2
The wide bandgap semiconductor materials provide a partially better performance both at a device level as well as at a system level as compared to the conventional silicon-based semiconductor technology
Data Source
AI summary
A member includes a silicon base substrate layer, a transition layer, a gallium nitride (GaN) buffer, a first aluminum gallium nitride (AlGaN) barrier layer, a first p-doped gallium nitride (pGaN) layer, where a portion of the GaN buffer layer forms a first GaN channel layer. The member further includes a second GaN channel layer, a second AlGaN barrier layer, and a second pGaN layer. The second pGaN layer is connected to the first pGaN layer by a connecting pGaN portion. The member further includes a gate contact, a source contact, and a drain contact, where the first pGaN channel layer is arranged between the source contact and the drain contact.