Multi-level Gate Control for GaN Transistors
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Solution Overview
Problem
Gallium Nitride (GaN) transistor devices, such as GaN HEMTs, face high power dissipation losses in reverse conduction mode and risk of safe operating area (SOA) violations due to large drain-source voltage, especially during turn-on transitions, which affects efficiency and reliability.
Innovation Solution
A circuit and method that utilize additional gate voltage levels beyond conventional two-level gate drivers, including a first, second, and third voltage level, to reduce reverse mode conductance losses and improve the SOA by selectively applying these voltage levels to the transistor device, allowing for reduced gate voltage during turn-on and adjusting gate voltage to maintain safe operating conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional two-level gate voltage is used for operating transistor device, then device can be turned ON and OFF, but reverse mode conductance losses are high and SOA may be violated
Solution Approach 1:
The patent applies parameter changes by introducing multiple gate voltage levels (first, second, and third voltage levels) instead of conventional two-level control. The control circuit selectively applies different voltage levels depending on the operating condition: third voltage level during reverse conduction to reduce losses, first voltage level during turn-on to improve SOA, and second voltage level for full conduction. This dynamic parameter adjustment resolves the contradiction between reducing energy losses and maintaining simple device control.
2Reliability
If large VDS voltage is applied during reverse conduction mode, then device can block reverse voltage, but power dissipation losses increase
Solution Approach 1:
The patent changes the gate voltage parameter dynamically based on operating mode. During reverse conduction mode, the control circuit applies the third voltage level to the gate, which reduces the reverse mode conductance while maintaining the ability to block reverse voltage. This parameter adjustment allows the device to achieve both reliable voltage blocking and reduced power dissipation, resolving the contradiction between reliability and energy loss.
3Speed
If fast turn-on transition is implemented, then switching speed improves, but SOA may be violated due to large device current
Solution Approach 1:
The patent applies preliminary action by using the first voltage level during the turn-on phase before full conduction is established. This preliminary voltage level limits the maximum current capability during the critical turn-on transition, preventing SOA violation. After the transition phase, the control circuit switches to the second voltage level for full conduction. This preliminary control action resolves the contradiction between fast switching and SOA compliance.
4Loss of energy
If additional gate voltage levels are applied, then reverse mode conductance losses are reduced and SOA is improved, but control circuit complexity increases
Solution Approach 1:
The patent implements parameter changes through a control circuit that selectively applies different gate voltage levels based on detected operating conditions. The control circuit monitors the transistor state and dynamically adjusts the gate voltage parameter to optimize performance. This approach reduces reverse mode conductance losses and improves SOA compliance while managing control circuit complexity through intelligent parameter selection rather than hardware complexity.
Data Source
AI summary
A circuit for operating a transistor device that acts as a switch is presented. The circuit includes the transistor device and a control circuit coupled to a gate of the transistor device. The control circuit is adapted to selectively apply at least a first voltage level, a second voltage level, and a third voltage level to the gate of the transistor device, wherein the first, second, and third voltage levels are distinct voltage levels. The disclosure further relates to a method of operating a transistor device that acts as a switch. The proposed circuit provides additional gate voltages, by contrast to conventional two-level gate drivers. By appropriate choice of the additional gate voltages, reverse mode conductance losses of the transistor device can be reduced and/or to the Safe Operating Area (SOA) of the transistor device can be improved.