GaN Enhancement-Mode Transistor Gate With Segmented Doping

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Gallium nitride (GaN) enhancement mode transistors face high gate leakage issues due to the difficulty in controlling Mg concentration near the gate contact, leading to trade-offs between threshold voltage and leakage current.

Innovation Solution

A method involving a p-doped AlxGayInzN gate layer with a discontinuous growth process, where the Mg concentration is increased above a threshold in the second part to create a self-compensation effect, reducing hole concentration and leakage, while maintaining a high enough concentration for 'normally off' mode operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high active Mg concentration is used in the p-GaN layer to achieve a high threshold voltage, then the threshold voltage is improved, but gate leakage increases

Engineering Contradiction:
Improvethreshold voltageVSAvoidgate leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The p-GaN layer is divided into multiple sub-layers with different Mg concentrations. The lower sub-layer has higher Mg concentration to provide sufficient threshold voltage, while the upper sub-layer has lower Mg concentration to reduce gate leakage. This segmentation allows independent optimization of each sub-layer's doping profile to resolve the contradiction between threshold voltage and gate leakage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the p-GaN layer are assigned different Mg concentrations based on their functional requirements. The region closer to the AlGaN barrier has higher Mg concentration for threshold control, while the region closer to the metal gate has lower Mg concentration for leakage reduction. This local quality variation optimizes both threshold voltage and gate leakage performance.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If the Mg concentration is reduced to lower gate leakage, then gate leakage is improved, but threshold voltage decreases

Engineering Contradiction:
Improvegate leakageVSAvoidthreshold voltage
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The p-GaN layer is segmented into sub-layers where the lower sub-layer maintains high Mg concentration to ensure adequate threshold voltage, while the upper sub-layer uses lower Mg concentration to minimize gate leakage. This segmentation enables the system to achieve low leakage without sacrificing threshold voltage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The Mg concentration parameter is varied through the thickness of the p-GaN layer rather than being uniform. By changing the doping concentration parameter spatially, the invention achieves optimal balance between threshold voltage and gate leakage, resolving the contradiction between these two parameters.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for a uniform and controllable depletion region at the metal gate interface, significantly reducing gate leakage and enhancing the reliability of GaN enhancement mode transistors.

Implementation Method 1

where the Mg concentration is increased above a threshold in the second part to create a self-compensation effect, reducing hole concentration and leakage

Methodology Applied
Scientific EffectSelf-compensation effect:

Implementation Method 2

by providing a metal gate layer thereon. This allows for a uniform and controllable depletion region at the metal gate interface

Methodology Applied
Scientific EffectSchottky contact:

Data Source

PatentEP3442026B1Gate for an enhancement-mode transistor
Publication Date: 2023.03.08 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • EP3442026B1 patent drawingFigure 1~2
  • EP3442026B1 patent drawingFigure 3

AI summary

A method for forming a gate of an enhancement-mode transistor comprising: a. providing a p-doped AlxGayInzN gate layer (2), consisting of a first (2a) and a second part (2b) on top of one another, above a p-doped Alx'Gay'Inz'N channel layer (4) of an enhancement-mode transistor under construction, and b. providing a metal gate layer (1) on the top surface of the second part, the metal gate layer being formed of a material such as to form a Schottky barrier with the second part, wherein providing the p-doped AlxGayInzN gate layer comprises the steps of: a1. growing the first part above the p-doped Alx'GayInz'N channel layer of the enhancement-mode transistor under construction, the first part having an average Mg concentration of at most 3x1019 atoms/cm3 and a2. growing a second part having an average Mg concentration higher than 3x1019 atoms/cm3 and having a top surface having a Mg concentration higher than 6x1019 atoms/cm3, on the first part.