GaN Transistors on Silicon via Etched Pits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge lies in achieving defect-free epitaxial deposition of GaN on non-orientation silicon substrates, which is necessary for integrating GaN high electron mobility transistors (HEMTs) with CMOS processing, as GaN typically requires orientation silicon substrates.
Innovation Solution
The solution involves etching holes in non-orientation silicon substrates with angled sidewalls to facilitate the growth of GaN channels and using a thick copper back-end metal contact to reduce drain-source resistance, enabling the fabrication of high voltage transistors with improved carrier mobility and wider bandgap materials like GaN.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If GaN is used as channel material on <100> silicon substrate, then carrier mobility and voltage capability are improved, but epitaxial deposition quality deteriorates due to orientation mismatch
Solution Approach 1:
The invention introduces a vertical dimension by etching pits into the silicon substrate, creating angled surfaces that provide the required crystal orientation for GaN epitaxial growth while maintaining compatibility with standard <100> silicon wafers. This dimensional transformation allows the GaN channel to form on surfaces with the correct orientation relationship.
Solution Approach 2:
The invention applies local quality by creating pits with specific angled surfaces only in the regions where GaN epitaxial deposition is required. The rest of the <100> silicon substrate maintains its original orientation and can be processed using standard CMOS techniques, thus resolving the orientation mismatch problem locally while preserving overall substrate compatibility.
2Ease of manufacture
If <100> silicon substrates are used, then CMOS processing compatibility is improved, but GaN epitaxial deposition quality deteriorates
Solution Approach 1:
By etching pits into the <100> silicon substrate to create angled surfaces, the invention enables GaN epitaxial growth with proper orientation while maintaining the overall <100> substrate structure that is compatible with standard CMOS processing lines.
Solution Approach 2:
The invention modifies only the local regions where GaN deposition is needed by creating pits with specific angles, while the bulk substrate remains <100> oriented and compatible with CMOS processing. This localized modification resolves the contradiction between substrate orientation requirements and CMOS compatibility.
3Loss of energy
If transistor area is reduced for higher voltage capability, then capacitive losses are reduced, but manufacturing complexity increases
Solution Approach 1:
The invention uses vertical pit structures to achieve high voltage capability in a compact footprint. By growing GaN on the angled surfaces of etched pits, the transistor can be miniaturized without sacrificing voltage handling capability, thus reducing capacitive losses while managing complexity through a systematic fabrication approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of high voltage transistors with reduced resistance and increased frequency capabilities, suitable for applications like grid-tie inverters, enhancing the efficiency and cost-effectiveness of photovoltaic energy production.
Implementation Method 1
defect free, useful epitaxial deposition of GaN is achievable only on orientation silicon substrate material
Implementation Method 2
using a thick copper back-end metal contact to reduce drain-source resistance
Data Source
AI summary
In an AlGaN channel transistor formed on a <100> orientation silicon wafer, a hole with walls slanted at 54 degrees is etched into the silicon to provide a <111> orientation substrate surface for forming the AlGaN channel transistor.