GaN Transistor Turn-Off Circuit for Drain dV/dt and EMI Control
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Solution Overview
Problem
Power converter circuits employing gallium nitride (GaN) transistors face issues with excessive voltage oscillations and ringing during turn-off, which can lead to electromagnetic interference (EMI) and potential damage to the transistors due to parasitic miller capacitance coupling drain voltage to the gate terminal, causing unintended turn-on.
Innovation Solution
A turn-off dV/dt control circuit is implemented, which senses the drain terminal voltage and adjusts the gate drive to reduce the rate of change of voltage, using a combination of sensing circuits, current mirrors, and logic and control circuits to maintain the GaN power transistor in an off-state by controlling the rate of change of drain current and voltage, thereby preventing secondary turn-on and reducing EMI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the GaN transistor is turned off rapidly to improve switching speed and efficiency, then productivity increases, but voltage oscillations and ringing occur due to parasitic miller capacitance, causing harmful EMI and potential transistor damage
Solution Approach 1:
A pull-down transistor is introduced as an intermediary component between the gate and ground. This intermediary transistor controls the discharge path of gate charge, providing a regulated mechanism to limit dV/dt during turn-off while maintaining efficient switching operation
Solution Approach 2:
The circuit dynamically changes the discharge resistance parameter by turning the pull-down transistor on or off. When activated, it provides a low-impedance discharge path that limits the rate of voltage change at the gate, thereby controlling dV/dt and reducing voltage oscillations and EMI
2Productivity
If the gate voltage is allowed to rise quickly to improve turn-on speed, then productivity increases, but the parasitic miller capacitance couples drain voltage to the gate, causing unintended secondary turn-on and loss of reliability
Solution Approach 1:
The pull-down transistor serves as a protective intermediary that actively counteracts voltage coupling through parasitic capacitance. By providing a controlled discharge path, it prevents voltage spikes from causing unintended turn-on, thereby maintaining reliability during high-speed operation
Solution Approach 2:
The circuit uses feedback through the pull-down transistor controlled by the logic circuit to monitor and regulate gate voltage conditions. When voltage rise indicates potential secondary turn-on risk, the feedback mechanism activates the pull-down transistor to clamp the voltage and prevent erroneous conduction
Data Source
AI summary
Circuits and methods that control a rate of change of a drain voltage as a function of time in a transistor are disclosed. In one aspect, the circuit includes a transistor having a gate terminal that controls operation of the transistor, and a control circuit coupled to the gate terminal and arranged to change a voltage at the gate terminal at a first rate of voltage with respect to time from a first voltage to a first intermediate voltage, and further arranged to change the voltage at the gate terminal at a second rate of voltage with respect to time from the first intermediate voltage to a second intermediate voltage, where the first rate is different than the second rate.