GaN-on-Silicon Wafer Chamfer Geometry for Crown Suppression

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Solution Overview

Problem

Existing methods for preventing crown formation in GaN heteroepitaxial growth on silicon substrates are costly and ineffective in reducing stress-induced cracking, leading to device defects and reduced yield.

Innovation Solution

A group-III nitride semiconductor wafer with a chamfering angle of 21° to 23° and a chamfering width of 500 μm to 1000 μm is used to suppress crown height, reducing substrate cracking and maintaining a sufficient effective area for device fabrication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If chamfering angle is changed from standard 22° to prevent crowns, then crown generation is suppressed, but manufacturing cost increases due to process changes

Engineering Contradiction:
Improvecrown generationVSAvoidmanufacturing cost
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by optimizing the chamfering angle to a specific range (20° to 25°) to suppress crown generation while maintaining compatibility with existing manufacturing processes. This parameter optimization resolves the contradiction by finding a value range that achieves the desired effect without requiring costly process changes.

Inventive Principle:
Principle #35Parameter changes

2Strength

If chamfering width is increased to suppress crown height, then substrate cracking is reduced, but effective device area decreases

Engineering Contradiction:
Improvesubstrate cracking resistanceVSAvoideffective device area
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

The patent applies parameter changes by optimizing the chamfering width to a specific range (500 μm to 1000 μm) that balances two competing requirements: suppressing crown height to prevent substrate cracking while preserving sufficient effective device area. This optimized parameter range resolves the contradiction by achieving both goals simultaneously.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If chamfering parameters are optimized to prevent crowns, then device yield increases, but stress-induced cracking is not sufficiently reduced

Engineering Contradiction:
Improvedevice yieldVSAvoidstress-induced cracking
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies parameter changes by simultaneously optimizing both chamfering angle (20° to 25°) and chamfering width (500 μm to 1000 μm) within specific ranges. This dual parameter optimization resolves the contradiction by achieving both high device yield through crown prevention and sufficient stress-induced cracking resistance through appropriate chamfering dimensions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively lowers crown height, preventing substrate cracking and ensuring high yield and suitability for high-frequency, high-output devices.

Implementation Method 1

a chamfering angle (θ1) relative to the surface of the substrate is 21° or more and 23° or less, and a chamfering width (X1) is 500 μm or more and 1000 μm or less... effectively lowers crown height, preventing substrate cracking

Methodology Applied
Scientific EffectStress concentration reduction:

Data Source

PatentUS20260011551A1Group-iii nitride semiconductor wafer and method for producing same
Publication Date: 2026.01.08 SHIN ETSU HANDOTAI CO LTD
  • US20260011551A1 patent drawing
  • US20260011551A1 patent drawing

AI summary

The present invention is a group-III nitride semiconductor wafer including a group-III nitride semiconductor film on a substrate for film formation, in which in a cross-sectional shape of a surface of the substrate for film formation of a chamfered portion of the substrate in a diameter direction, a chamfering angle (θ1) relative to the surface of the substrate is 21° or more and 23° or less, and on the surface of the substrate in a diameter direction, a chamfering width (X1) is 500 μm or more and 1000 μm or less, which is a distance between an outer peripheral end portion of the substrate for film formation and an inner peripheral end portion of the chamfered portion. Thereby, the group-III nitride semiconductor wafer, in which the group-III nitride semiconductor film is provided on the substrate for film formation, and the method for producing the same are provided.